mirror of https://github.com/VLSIDA/OpenRAM.git
209 lines
8.6 KiB
Python
209 lines
8.6 KiB
Python
# See LICENSE for licensing information.
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#
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# Copyright (c) 2016-2023 Regents of the University of California and The Board
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# of Regents for the Oklahoma Agricultural and Mechanical College
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# (acting for and on behalf of Oklahoma State University)
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# All rights reserved.
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#
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from datetime import datetime
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from scipy.sparse import csr_matrix
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from scipy.sparse.csgraph import minimum_spanning_tree
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from openram import debug
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from openram import print_time
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from .router import router
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from . import grid_utils
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from .signal_grid import signal_grid
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class supply_tree_router(router):
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"""
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A router class to read an obstruction map from a gds and
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routes a grid to connect the supply on the two layers.
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"""
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def __init__(self, layers, design, bbox=None, pin_type=None):
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"""
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This will route on layers in design. It will get the blockages from
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either the gds file name or the design itself (by saving to a gds file).
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"""
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# Power rail width in minimum wire widths
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# This is set to match the signal router so that the grids are aligned
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# for prettier routes.
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self.route_track_width = 1
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# The pin escape router already made the bounding box big enough,
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# so we can use the regular bbox here.
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if pin_type:
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debug.check(pin_type in ["left", "right", "top", "bottom", "single", "ring"],
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"Invalid pin type {}".format(pin_type))
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self.pin_type = pin_type
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router.__init__(self,
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layers,
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design,
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bbox=bbox,
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route_track_width=self.route_track_width)
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def route(self, vdd_name="vdd", gnd_name="gnd"):
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"""
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Route the two nets in a single layer.
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Setting pin stripe will make a power rail on the left side.
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"""
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debug.info(1, "Running supply router on {0} and {1}...".format(vdd_name, gnd_name))
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self.vdd_name = vdd_name
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self.gnd_name = gnd_name
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# Clear the pins if we have previously routed
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if (hasattr(self, 'rg')):
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self.clear_pins()
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else:
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# Creat a routing grid over the entire area
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# FIXME: This could be created only over the routing region,
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# but this is simplest for now.
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self.create_routing_grid(signal_grid)
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start_time = datetime.now()
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# Get the pin shapes
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self.find_pins_and_blockages([self.vdd_name, self.gnd_name])
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print_time("Finding pins and blockages", datetime.now(), start_time, 3)
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# Add side pins if enabled
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if self.pin_type in ["left", "right", "top", "bottom"]:
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self.add_side_supply_pin(self.vdd_name, side=self.pin_type)
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self.add_side_supply_pin(self.gnd_name, side=self.pin_type)
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elif self.pin_type == "ring":
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self.add_ring_supply_pin(self.vdd_name)
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self.add_ring_supply_pin(self.gnd_name)
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#self.write_debug_gds("initial_tree_router.gds",False)
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#breakpoint()
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# Route the supply pins to the supply rails
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# Route vdd first since we want it to be shorter
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start_time = datetime.now()
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self.route_pins(vdd_name)
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self.route_pins(gnd_name)
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print_time("Maze routing supplies", datetime.now(), start_time, 3)
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# Did we route everything??
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if not self.check_all_routed(vdd_name):
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return False
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if not self.check_all_routed(gnd_name):
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return False
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return True
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def route_pins(self, pin_name):
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"""
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This will route each of the remaining pin components to the other pins.
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After it is done, the cells are added to the pin blockage list.
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"""
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remaining_components = sum(not x.is_routed() for x in self.pin_groups[pin_name])
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debug.info(1, "Routing {0} with {1} pins.".format(pin_name,
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remaining_components))
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# Save pin center locations
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if False:
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debug.info(2, "Creating location file {0}_{1}.csv".format(self.cell.name, pin_name))
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f = open("{0}_{1}.csv".format(self.cell.name, pin_name), "w")
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pin_size = len(self.pin_groups[pin_name])
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for index1, pg1 in enumerate(self.pin_groups[pin_name]):
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location = list(pg1.grids)[0]
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f.write("{0},{1},{2}\n".format(location.x, location.y, location.z))
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f.close()
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# Create full graph
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debug.info(2, "Creating adjacency matrix")
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pin_size = len(self.pin_groups[pin_name])
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adj_matrix = [[0] * pin_size for i in range(pin_size)]
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for index1, pg1 in enumerate(self.pin_groups[pin_name]):
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for index2, pg2 in enumerate(self.pin_groups[pin_name]):
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if index1>=index2:
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continue
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dist = int(grid_utils.distance_set(list(pg1.grids)[0], pg2.grids))
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adj_matrix[index1][index2] = dist
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# Find MST
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debug.info(2, "Finding Minimum Spanning Tree")
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X = csr_matrix(adj_matrix)
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from scipy.sparse import save_npz
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#print("Saving {}.npz".format(self.cell.name))
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#save_npz("{}.npz".format(self.cell.name), X)
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#exit(1)
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Tcsr = minimum_spanning_tree(X)
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mst = Tcsr.toarray().astype(int)
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connections = []
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for x in range(pin_size):
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for y in range(pin_size):
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if x >= y:
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continue
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if mst[x][y]>0:
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connections.append((x, y))
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# Route MST components
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level=99
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for index, (src, dest) in enumerate(connections):
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if not (index % 25):
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debug.info(1, "{0} supply segments routed, {1} remaining.".format(index, len(connections) - index))
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self.route_signal(pin_name, src, dest)
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if False and pin_name == "gnd":
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debug.info(level, "\nSRC {}: ".format(src) + str(self.pin_groups[pin_name][src].grids) + str(self.pin_groups[pin_name][src].blockages))
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debug.info(level, ("DST {}: ".format(dest) + str(self.pin_groups[pin_name][dest].grids) + str(self.pin_groups[pin_name][dest].blockages)))
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self.write_debug_gds("post_{0}_{1}.gds".format(src, dest), False)
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#self.write_debug_gds("final_tree_router_{}.gds".format(pin_name), False)
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#return
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def route_signal(self, pin_name, src_idx, dest_idx):
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# First pass, try to route normally
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# Second pass, clear prior pin blockages so that you can route over other metal
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# of the same supply. Otherwise, this can create a lot of circular routes due to accidental overlaps.
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for unblock_routes in [False, True]:
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for detour_scale in [2 * pow(2, x) for x in range(5)]:
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debug.info(2, "Routing {0} to {1} with scale {2}".format(src_idx, dest_idx, detour_scale))
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# Clear everything in the routing grid.
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self.rg.reinit()
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# This is inefficient since it is non-incremental, but it was
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# easier to debug.
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self.prepare_blockages(src=(pin_name, src_idx), dest=(pin_name, dest_idx))
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if unblock_routes:
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msg = "Unblocking supply self blockages to improve access (may cause DRC errors):\n{0}\n{1})"
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debug.warning(msg.format(pin_name,
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self.pin_groups[pin_name][src_idx].pins))
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self.set_blockages(self.path_blockages, False)
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# Add the single component of the pin as the source
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# which unmarks it as a blockage too
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self.set_pin_component_source(pin_name, src_idx)
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# Marks all pin components except index as target
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# which unmarks it as a blockage too
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self.set_pin_component_target(pin_name, dest_idx)
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# Actually run the A* router
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if self.run_router(detour_scale=detour_scale):
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return
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#if detour_scale > 2:
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# self.write_debug_gds("route_{0}_{1}_d{2}.gds".format(src_idx, dest_idx, detour_scale), False)
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self.write_debug_gds("debug_route.gds", True)
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def add_io_pin(self, instance, pin_name, new_name=""):
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"""
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Add a signle input or output pin up to metal 3.
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"""
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pin = instance.get_pins(pin_name)
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if new_name == "":
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new_name = pin_name
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# Just use the power pin function for now to save code
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self.add_power_pin(name=new_name, loc=pin.center(), start_layer=pin.layer)
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