mirror of https://github.com/VLSIDA/OpenRAM.git
72 lines
1.7 KiB
Python
Executable File
72 lines
1.7 KiB
Python
Executable File
#!/usr/bin/env python3
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# See LICENSE for licensing information.
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#
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# Copyright (c) 2016-2023 Regents of the University of California and The Board
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# of Regents for the Oklahoma Agricultural and Mechanical College
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# (acting for and on behalf of Oklahoma State University)
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# All rights reserved.
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#
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"""
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ROM Compiler
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The output files append the given suffixes to the output name:
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a spice (.sp) file for circuit simulation
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a GDS2 (.gds) file containing the layout
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"""
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import sys
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import os
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import datetime
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# You don't need the next two lines if you're sure that openram package is installed
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from common import *
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make_openram_package()
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import openram
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(OPTS, args) = openram.parse_args()
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# Check that we are left with a single configuration file as argument.
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if len(args) != 1:
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print(openram.USAGE)
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sys.exit(2)
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# These depend on arguments, so don't load them until now.
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from openram import debug
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# Parse config file and set up all the options
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openram.init_openram(config_file=args[0])
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# Only print banner here so it's not in unit tests
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openram.print_banner()
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# Keep track of running stats
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start_time = datetime.datetime.now()
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openram.print_time("Start", start_time)
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output_extensions = [ "sp", "v"]
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# Only output lef/gds if back-end
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if not OPTS.netlist_only:
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output_extensions.extend(["gds"])
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output_files = ["{0}{1}.{2}".format(OPTS.output_path,
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OPTS.output_name, x)
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for x in output_extensions]
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debug.print_raw("Output files are: ")
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for path in output_files:
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debug.print_raw(path)
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from openram import rom
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r = rom()
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# Output the files for the resulting ROM
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r.save()
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# Delete temp files etc.
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openram.end_openram()
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openram.print_time("End", datetime.datetime.now(), start_time) |