mirror of https://github.com/VLSIDA/OpenRAM.git
142 lines
5.3 KiB
Python
142 lines
5.3 KiB
Python
import hierarchy_layout
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import hierarchy_spice
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import globals
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import verify
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import debug
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import os
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from globals import OPTS
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total_drc_errors = 0
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total_lvs_errors = 0
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class hierarchy_design(hierarchy_spice.spice, hierarchy_layout.layout):
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"""
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Design Class for all modules to inherit the base features.
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Class consisting of a set of modules and instances of these modules
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"""
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name_map = []
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def __init__(self, name):
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try:
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self.gds_file
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except AttributeError:
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self.gds_file = OPTS.openram_tech + "gds_lib/" + name + ".gds"
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try:
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self.sp_file
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except AttributeError:
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self.sp_file = OPTS.openram_tech + "sp_lib/" + name + ".sp"
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self.name = name
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hierarchy_layout.layout.__init__(self, name)
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hierarchy_spice.spice.__init__(self, name)
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# Check if the name already exists, if so, give an error
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# because each reference must be a unique name.
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# These modules ensure unique names or have no changes if they
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# aren't unique
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ok_list = ['contact',
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'ptx',
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'pbitcell',
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'replica_pbitcell',
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'sram',
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'hierarchical_predecode2x4',
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'hierarchical_predecode3x8']
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# Library cells don't change
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if self.is_library_cell:
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return
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# Name is unique so far
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elif name not in hierarchy_design.name_map:
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hierarchy_design.name_map.append(name)
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else:
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# Name is in our list of exceptions (they don't change)
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for ok_names in ok_list:
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if ok_names == self.__class__.__name__:
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break
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else:
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debug.error("Duplicate layout reference name {0} of class {1}. GDS2 requires names be unique.".format(name,self.__class__),-1)
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def get_layout_pins(self,inst):
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""" Return a map of pin locations of the instance offset """
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# find the instance
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for i in self.insts:
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if i.name == inst.name:
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break
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else:
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debug.error("Couldn't find instance {0}".format(inst_name),-1)
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inst_map = inst.mod.pin_map
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return inst_map
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def DRC_LVS(self, final_verification=False):
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"""Checks both DRC and LVS for a module"""
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# Unit tests will check themselves.
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# Do not run if disabled in options.
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if (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
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global total_drc_errors
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global total_lvs_errors
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tempspice = OPTS.openram_temp + "/temp.sp"
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tempgds = OPTS.openram_temp + "/temp.gds"
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self.sp_write(tempspice)
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self.gds_write(tempgds)
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num_drc_errors = verify.run_drc(self.name, tempgds, final_verification)
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num_lvs_errors = verify.run_lvs(self.name, tempgds, tempspice, final_verification)
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debug.check(num_drc_errors == 0,"DRC failed for {0} with {1} error(s)".format(self.name,num_drc_errors))
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debug.check(num_lvs_errors == 0,"LVS failed for {0} with {1} errors(s)".format(self.name,num_lvs_errors))
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total_drc_errors += num_drc_errors
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total_lvs_errors += num_lvs_errors
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os.remove(tempspice)
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os.remove(tempgds)
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def DRC(self, final_verification=False):
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"""Checks DRC for a module"""
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# Unit tests will check themselves.
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# Do not run if disabled in options.
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if (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
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global total_drc_errors
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tempgds = OPTS.openram_temp + "/temp.gds"
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self.gds_write(tempgds)
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num_errors = verify.run_drc(self.name, tempgds, final_verification)
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total_drc_errors += num_errors
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debug.check(num_errors == 0,"DRC failed for {0} with {1} error(s)".format(self.name,num_error))
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os.remove(tempgds)
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def LVS(self, final_verification=False):
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"""Checks LVS for a module"""
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# Unit tests will check themselves.
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# Do not run if disabled in options.
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if (not OPTS.is_unit_test and OPTS.check_lvsdrc and (OPTS.inline_lvsdrc or final_verification)):
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global total_lvs_errors
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tempspice = OPTS.openram_temp + "/temp.sp"
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tempgds = OPTS.openram_temp + "/temp.gds"
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self.sp_write(tempspice)
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self.gds_write(tempgds)
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num_errors = verify.run_lvs(self.name, tempgds, tempspice, final_verification)
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total_lvs_errors += num_errors
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debug.check(num_errors == 0,"LVS failed for {0} with {1} error(s)".format(self.name,num_errors))
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os.remove(tempspice)
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os.remove(tempgds)
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def __str__(self):
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""" override print function output """
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return "design: " + self.name
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def __repr__(self):
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""" override print function output """
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text="( design: " + self.name + " pins=" + str(self.pins) + " " + str(self.width) + "x" + str(self.height) + " )\n"
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for i in self.objs:
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text+=str(i)+",\n"
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for i in self.insts:
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text+=str(i)+",\n"
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return text
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