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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-07 03:20:39 +02:00
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c4c844a8a272bb1aeb54604f516add5b158f8d1b
OpenRAM/technology/scn3me_subm/gds_lib
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History
Matt Guthaus 763f1e8dee Finish renaming replica bitcell and bitline pin names.
2018-09-04 14:03:15 -07:00
..
cell_6t.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
dff.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
ms_flop.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
replica_cell_6t.gds
Finish renaming replica bitcell and bitline pin names.
2018-09-04 14:03:15 -07:00
sense_amp.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
tri_gate.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
write_driver.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
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