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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-08 04:11:47 +02:00
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b24c8a42a13c8e6eb8a9b5c495848ae703233673
OpenRAM/technology/scn3me_subm/gds_lib
T
History
Matt Guthaus 763f1e8dee Finish renaming replica bitcell and bitline pin names.
2018-09-04 14:03:15 -07:00
..
cell_6t.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
dff.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
ms_flop.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
replica_cell_6t.gds
Finish renaming replica bitcell and bitline pin names.
2018-09-04 14:03:15 -07:00
sense_amp.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
tri_gate.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
write_driver.gds
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
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