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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-09-02 02:57:53 +02:00
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aeaab13d28c1b6ec44144753200123098235d351
OpenRAM/compiler/verify
T
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Michael Timothy Grimes 7ef7c084cd fixed typo that added two '/' characters to path sys command (i.e. from tech//SCN3ME_SUBM.30 to tech/SCN3ME_SUBM.30)
2018-08-29 16:01:25 -07:00
..
__init__.py
Add parameters to give preference to DRC/LVS/PEX tools like we do for spice.
2018-08-28 13:41:26 -07:00
assura.py
Add DRC/LVS/PEX statistics in verbose=1 mode
2018-07-11 11:59:24 -07:00
calibre.py
Add temporary options to LVS to allow name merging
2018-07-18 15:10:29 -07:00
magic.py
fixed typo that added two '/' characters to path sys command (i.e. from tech//SCN3ME_SUBM.30 to tech/SCN3ME_SUBM.30)
2018-08-29 16:01:25 -07:00
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