| .. |
|
base
|
Redesign of pbitcell for newer process technolgies.
|
2018-10-15 06:29:51 -07:00 |
|
characterizer
|
fixed html typos, added logo, added placeholder timing and current, began ports section
|
2018-10-17 19:27:09 -07:00 |
|
datasheet
|
fixed html typos, added logo, added placeholder timing and current, began ports section
|
2018-10-17 19:27:09 -07:00 |
|
gdsMill
|
Add back LEF blockages. Remove "absolute" flags from GDS output
|
2018-09-05 09:28:43 -07:00 |
|
modules
|
Change RBL size to 50% of row size.
|
2018-10-11 10:39:24 -07:00 |
|
pgates
|
adding 6T transistor size parameters to tech files for use in pbitcell.
|
2018-10-17 07:28:56 -07:00 |
|
router
|
Remove banks from test configs
|
2018-09-24 11:41:51 -07:00 |
|
tests
|
Working out bugs in psram functional test for SCMOS. Commenting out for now.
|
2018-10-17 07:45:24 -07:00 |
|
verify
|
Hard code flatten commands for the unique id precharge array
|
2018-09-13 15:15:41 -07:00 |
|
Makefile
|
Add Makefile for parallel test execution.
|
2018-01-22 13:39:07 -08:00 |
|
debug.py
|
Output debug warnings and errors to stderr. Clean up regress script a bit.
|
2018-07-11 09:51:28 -07:00 |
|
example_config_freepdk45.py
|
Merge branch 'dev' of https://github.com/VLSIDA/PrivateRAM into multiport
|
2018-10-17 07:32:03 -07:00 |
|
example_config_scn4m_subm.py
|
Merge branch 'dev' of https://github.com/VLSIDA/PrivateRAM into multiport
|
2018-10-17 07:32:03 -07:00 |
|
gen_stimulus.py
|
Convert entire OpenRAM to use python3. Works with Python 3.6.
|
2018-05-14 16:15:45 -07:00 |
|
globals.py
|
reorganized code structure
|
2018-10-11 15:59:06 -07:00 |
|
openram.py
|
added analytical model support, added proper output with sram.py
|
2018-10-12 13:22:12 -07:00 |
|
options.py
|
Merge branch 'dev' of https://github.com/VLSIDA/PrivateRAM into multiport
|
2018-09-27 02:02:24 -07:00 |
|
sram.py
|
added analytical model support, added proper output with sram.py
|
2018-10-12 13:22:12 -07:00 |
|
sram_1bank.py
|
Converted all submodules to use _bit notation instead of [bit]
|
2018-10-11 09:53:08 -07:00 |
|
sram_2bank.py
|
Cleanup some items with new sram_config. Update unit tests accordingly.
|
2018-09-04 10:47:24 -07:00 |
|
sram_4bank.py
|
Converted all submodules to use _bit notation instead of [bit]
|
2018-10-11 09:53:08 -07:00 |
|
sram_base.py
|
Converted all submodules to use _bit notation instead of [bit]
|
2018-10-11 09:53:08 -07:00 |
|
sram_config.py
|
Cleanup some items with new sram_config. Update unit tests accordingly.
|
2018-09-04 10:47:24 -07:00 |
ab6afb7ca8