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luke
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OpenRAM
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a12ebeed9fbe0e8951434dc4bbb0a5d36bdd771d
OpenRAM
/
technology
/
scn3me_subm
T
History
Matt Guthaus
a12ebeed9f
Add multiple process corners. Unit tests use nominal corner only. Add fake SCMOS nominal models, but they are broken.
2018-02-12 09:33:23 -08:00
..
gds_lib
Add extra pwc to 6T SCMOS cell.
2018-02-05 14:44:15 -08:00
mag_lib
Add extra pwc to 6T SCMOS cell.
2018-02-05 14:44:15 -08:00
models
/nom
Add multiple process corners. Unit tests use nominal corner only. Add fake SCMOS nominal models, but they are broken.
2018-02-12 09:33:23 -08:00
sp_lib
Fix pin nameon sense amp spice. Fix NAND2 bug in hierarchical decoder.
2018-02-02 14:08:56 -08:00
sue_lib
RELEASE 1.0
2016-11-08 09:57:35 -08:00
tech
Add multiple process corners. Unit tests use nominal corner only. Add fake SCMOS nominal models, but they are broken.
2018-02-12 09:33:23 -08:00
layers.map
RELEASE 1.0
2016-11-08 09:57:35 -08:00
