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https://github.com/VLSIDA/OpenRAM.git
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Matt Guthaus
7cca6b4f69
Add back scn3me_subm tech files Update cells to be DRC clean with rule 5.5.b Allow magic for FreePDK45 but not debugged. Revert to older Magic tech file for SCN3ME_SUBM
28 lines
1019 B
SourcePawn
28 lines
1019 B
SourcePawn
*********************** "dff" ******************************
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* Positive edge-triggered FF
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.SUBCKT dff D Q clk vdd gnd
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M0 vdd clk a_2_6# vdd p w=12u l=0.6u
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M1 a_17_74# D vdd vdd p w=6u l=0.6u
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M2 a_22_6# clk a_17_74# vdd p w=6u l=0.6u
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M3 a_31_74# a_2_6# a_22_6# vdd p w=6u l=0.6u
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M4 vdd a_34_4# a_31_74# vdd p w=6u l=0.6u
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M5 a_34_4# a_22_6# vdd vdd p w=6u l=0.6u
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M6 a_61_74# a_34_4# vdd vdd p w=6u l=0.6u
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M7 a_66_6# a_2_6# a_61_74# vdd p w=6u l=0.6u
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M8 a_76_84# clk a_66_6# vdd p w=3u l=0.6u
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M9 vdd Q a_76_84# vdd p w=3u l=0.6u
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M10 gnd clk a_2_6# gnd n w=6u l=0.6u
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M11 Q a_66_6# vdd vdd p w=12u l=0.6u
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M12 a_17_6# D gnd gnd n w=3u l=0.6u
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M13 a_22_6# a_2_6# a_17_6# gnd n w=3u l=0.6u
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M14 a_31_6# clk a_22_6# gnd n w=3u l=0.6u
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M15 gnd a_34_4# a_31_6# gnd n w=3u l=0.6u
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M16 a_34_4# a_22_6# gnd gnd n w=3u l=0.6u
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M17 a_61_6# a_34_4# gnd gnd n w=3u l=0.6u
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M18 a_66_6# clk a_61_6# gnd n w=3u l=0.6u
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M19 a_76_6# a_2_6# a_66_6# gnd n w=3u l=0.6u
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M20 gnd Q a_76_6# gnd n w=3u l=0.6u
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M21 Q a_66_6# gnd gnd n w=6u l=0.6u
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.ENDS dff
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