mirror of https://github.com/VLSIDA/OpenRAM.git
24 lines
742 B
Python
24 lines
742 B
Python
import debug
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import design
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import utils
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from tech import GDS,layer
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class write_driver(design.design):
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"""
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Tristate write driver to be active during write operations only.
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This module implements the write driver cell used in the design. It
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is a hand-made cell, so the layout and netlist should be available in
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the technology library.
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"""
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pins = ["din", "BL", "BR", "en", "gnd", "vdd"]
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chars = utils.auto_measure_libcell(pins, "write_driver", GDS["unit"], layer["boundary"])
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def __init__(self, name):
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design.design.__init__(self, name)
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debug.info(2, "Create write_driver object")
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self.width = write_driver.chars["width"]
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self.height = write_driver.chars["height"]
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