mirror of https://github.com/VLSIDA/OpenRAM.git
461 lines
19 KiB
Python
461 lines
19 KiB
Python
# See LICENSE for licensing information.
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#
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# Copyright (c) 2016-2021 Regents of the University of California and The Board
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# of Regents for the Oklahoma Agricultural and Mechanical College
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# (acting for and on behalf of Oklahoma State University)
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# All rights reserved.
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#
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from base import design
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from base import vector
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import debug
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import math
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from bisect import bisect_left
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from tech import layer, drc
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from globals import OPTS
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from tech import cell_properties as cell_props
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if cell_props.ptx.bin_spice_models:
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from tech import nmos_bins, pmos_bins
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class pgate(design):
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"""
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This is a module that implements some shared
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functions for parameterized gates.
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"""
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def __init__(self, name, height=None, add_wells=True):
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""" Creates a generic cell """
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super().__init__(name)
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if height:
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self.height = height
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elif not height:
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# By default, something simple
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self.height = 14 * self.m1_pitch
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self.add_wells = add_wells
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if "li" in layer:
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self.route_layer = "li"
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else:
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self.route_layer = "m1"
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self.route_layer_width = getattr(self, "{}_width".format(self.route_layer))
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self.route_layer_space = getattr(self, "{}_space".format(self.route_layer))
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self.route_layer_pitch = getattr(self, "{}_pitch".format(self.route_layer))
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# hack for enclosing input pin with npc
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self.input_pin_vias = []
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# This is the space from a S/D contact to the supply rail
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contact_to_vdd_rail_space = 0.5 * self.route_layer_width + self.route_layer_space
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# This is a poly-to-poly of a flipped cell
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poly_to_poly_gate_space = self.poly_extend_active + 0.5 * self.poly_space
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self.top_bottom_space = max(contact_to_vdd_rail_space,
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poly_to_poly_gate_space)
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self.create_netlist()
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if not OPTS.netlist_only:
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self.create_layout()
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self.add_boundary()
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self.DRC_LVS()
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def create_netlist(self):
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""" Pure virtual function """
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debug.error("Must over-ride create_netlist.", -1)
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def create_layout(self):
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""" Pure virtual function """
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debug.error("Must over-ride create_layout.", -1)
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def connect_pin_to_rail(self, inst, pin_name, supply_name):
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""" Connects a ptx pin to a supply rail. """
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supply_pin = self.get_pin(supply_name)
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source_pins = inst.get_pins(pin_name)
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for source_pin in source_pins:
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if supply_name == "gnd":
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height = supply_pin.by() - source_pin.by()
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elif supply_name == "vdd":
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height = supply_pin.uy() - source_pin.by()
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else:
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debug.error("Invalid supply name.", -1)
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debug.check(supply_pin.layer == source_pin.layer, "Supply pin is not on correct layer.")
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self.add_rect(layer=source_pin.layer,
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offset=source_pin.ll(),
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height=height,
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width=source_pin.width())
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def route_input_gate(self, pmos_inst, nmos_inst, ypos, name, position="left", directions=None):
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"""
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Route the input gate to the left side of the cell for access.
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Position specifies to place the contact the left, center, or
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right of gate.
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"""
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nmos_gate_pin = nmos_inst.get_pin("G")
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pmos_gate_pin = pmos_inst.get_pin("G")
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# Check if the gates are aligned and give an error if they aren't!
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if nmos_gate_pin.ll().x != pmos_gate_pin.ll().x:
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self.gds_write("unaliged_gates.gds")
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debug.check(nmos_gate_pin.ll().x == pmos_gate_pin.ll().x,
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"Connecting unaligned gates not supported. See unaligned_gates.gds.")
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# Pick point on the left of NMOS and up to PMOS
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nmos_gate_pos = nmos_gate_pin.ul() + vector(0.5 * self.poly_width, 0)
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pmos_gate_pos = vector(nmos_gate_pos.x, pmos_gate_pin.bc().y)
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self.add_path("poly", [nmos_gate_pos, pmos_gate_pos])
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# Add the via to the cell midpoint along the gate
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left_gate_offset = vector(nmos_gate_pin.lx(), ypos)
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# Center is completely symmetric.
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contact_width = self.poly_contact.width
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if position == "center":
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contact_offset = left_gate_offset \
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+ vector(0.5 * self.poly_width, 0)
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elif position == "farleft":
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contact_offset = left_gate_offset \
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- vector(0.5 * self.poly_contact.width, 0)
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elif position == "left":
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contact_offset = left_gate_offset \
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- vector(0.5 * contact_width - 0.5 * self.poly_width, 0)
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elif position == "right":
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contact_offset = left_gate_offset \
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+ vector(0.5 * contact_width + 0.5 * self.poly_width, 0)
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else:
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debug.error("Invalid contact placement option.", -1)
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via = self.add_via_stack_center(from_layer="poly",
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to_layer=self.route_layer,
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offset=contact_offset,
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directions=directions)
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self.add_layout_pin_rect_center(text=name,
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layer=self.route_layer,
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offset=contact_offset,
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width=via.mod.second_layer_width,
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height=via.mod.second_layer_height)
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# This is to ensure that the contact is
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# connected to the gate
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mid_point = contact_offset.scale(0.5, 1) \
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+ left_gate_offset.scale(0.5, 0)
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self.add_rect_center(layer="poly",
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offset=mid_point,
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height=self.poly_contact.first_layer_width,
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width=left_gate_offset.x - contact_offset.x)
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return via
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def extend_wells(self):
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""" Extend the n/p wells to cover whole cell """
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# This should match the cells in the cell library
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self.nwell_yoffset = 0.48 * self.height
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full_height = self.height + 0.5 * self.m1_width
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# FIXME: float rounding problem
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if "nwell" in layer:
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# Add a rail width to extend the well to the top of the rail
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nwell_max_offset = max(self.find_highest_layer_coords("nwell").y,
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full_height)
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nwell_position = vector(0, self.nwell_yoffset) - vector(self.well_extend_active, 0)
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nwell_height = nwell_max_offset - self.nwell_yoffset
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self.add_rect(layer="nwell",
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offset=nwell_position,
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width=self.width + 2 * self.well_extend_active,
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height=nwell_height)
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if "vtg" in layer:
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self.add_rect(layer="vtg",
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offset=nwell_position,
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width=self.width + 2 * self.well_extend_active,
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height=nwell_height)
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# Start this half a rail width below the cell
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if "pwell" in layer:
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pwell_min_offset = min(self.find_lowest_layer_coords("pwell").y,
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-0.5 * self.m1_width)
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pwell_position = vector(-self.well_extend_active, pwell_min_offset)
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pwell_height = self.nwell_yoffset - pwell_position.y
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self.add_rect(layer="pwell",
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offset=pwell_position,
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width=self.width + 2 * self.well_extend_active,
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height=pwell_height)
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if "vtg" in layer:
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self.add_rect(layer="vtg",
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offset=pwell_position,
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width=self.width + 2 * self.well_extend_active,
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height=pwell_height)
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if cell_props.pgate.add_implants:
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self.extend_implants()
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def add_nwell_contact(self, pmos, pmos_pos):
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""" Add an nwell contact next to the given pmos device. """
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layer_stack = self.active_stack
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# To the right a spacing away from the pmos right active edge
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contact_xoffset = pmos_pos.x + pmos.active_width \
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+ self.active_space
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# Must be at least an well enclosure of active down
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# from the top of the well
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# OR align the active with the top of PMOS active.
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max_y_offset = self.height + 0.5 * self.m1_width
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contact_yoffset = min(self.height - 0.5 * self.implant_width,
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self.get_tx_insts("pmos")[0].uy()) \
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- pmos.active_contact.first_layer_height \
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- self.implant_enclose_active
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contact_offset = vector(contact_xoffset, contact_yoffset)
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# Offset by half a contact in x and y
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contact_offset += vector(0.5 * pmos.active_contact.first_layer_width,
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0.5 * pmos.active_contact.first_layer_height)
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# This over-rides the default one with a custom direction
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self.nwell_contact = self.add_via_center(layers=layer_stack,
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offset=contact_offset,
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implant_type="n",
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well_type="n",
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directions=("V", "V"))
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self.add_rect_center(layer=self.route_layer,
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offset=contact_offset + vector(0, 0.5 * (self.height - contact_offset.y)),
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width=self.nwell_contact.mod.second_layer_width,
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height=self.height - contact_offset.y)
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# Now add the full active and implant for the PMOS
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# active_offset = pmos_pos + vector(pmos.active_width,0)
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# This might be needed if the spacing between the actives
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# is not satisifed
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# self.add_rect(layer="active",
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# offset=active_offset,
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# width=pmos.active_contact.width,
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# height=pmos.active_height)
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# we need to ensure implants don't overlap and are
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# spaced far enough apart
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# implant_spacing = self.implant_space+self.implant_enclose_active
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# implant_offset = active_offset + vector(implant_spacing,0) \
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# - vector(0,self.implant_enclose_active)
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# implant_width = pmos.active_contact.width \
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# + 2*self.implant_enclose_active
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# implant_height = pmos.active_height + 2*self.implant_enclose_active
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# self.add_rect(layer="nimplant",
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# offset=implant_offset,
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# width=implant_width,
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# height=implant_height)
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# Return the top of the well
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def extend_implants(self):
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"""
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Add top-to-bottom implants for adjacency issues in s8.
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"""
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if self.add_wells:
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rightx = None
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else:
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rightx = self.width
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nmos_insts = self.get_tx_insts("nmos")
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if len(nmos_insts) > 0:
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self.add_enclosure(nmos_insts,
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layer="nimplant",
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extend=self.implant_enclose_active,
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leftx=0,
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rightx=rightx,
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boty=0)
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pmos_insts = self.get_tx_insts("pmos")
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if len(pmos_insts) > 0:
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self.add_enclosure(pmos_insts,
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layer="pimplant",
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extend=self.implant_enclose_active,
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leftx=0,
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rightx=rightx,
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topy=self.height)
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self.add_rect(layer="pimplant",
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offset=vector(0, self.height - 0.5 * self.implant_width),
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width=self.width,
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height=self.implant_width)
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self.add_rect(layer="nimplant",
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offset=vector(0, -0.5 * self.implant_width),
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width=self.width,
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height=self.implant_width)
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# try:
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# ntap_insts = [self.nwell_contact]
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# self.add_enclosure(ntap_insts,
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# layer="nimplant",
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# extend=self.implant_enclose_active,
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# rightx=self.width,
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# topy=self.height)
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# except AttributeError:
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# pass
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# try:
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# ptap_insts = [self.pwell_contact]
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# self.add_enclosure(ptap_insts,
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# layer="pimplant",
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# extend=self.implant_enclose_active,
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# rightx=self.width,
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# boty=0)
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# except AttributeError:
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# pass
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def add_pwell_contact(self, nmos, nmos_pos):
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""" Add an pwell contact next to the given nmos device. """
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layer_stack = self.active_stack
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# To the right a spacing away from the nmos right active edge
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contact_xoffset = nmos_pos.x + nmos.active_width \
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+ self.active_space
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# Allow an nimplant below it under the rail
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contact_yoffset = max(0.5 * self.implant_width + self.implant_enclose_active,
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self.get_tx_insts("nmos")[0].by())
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contact_offset = vector(contact_xoffset, contact_yoffset)
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# Offset by half a contact
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contact_offset += vector(0.5 * nmos.active_contact.first_layer_width,
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0.5 * nmos.active_contact.first_layer_height)
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self.pwell_contact= self.add_via_center(layers=layer_stack,
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offset=contact_offset,
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implant_type="p",
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well_type="p",
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directions=("V", "V"))
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self.add_rect_center(layer=self.route_layer,
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offset=contact_offset.scale(1, 0.5),
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width=self.pwell_contact.mod.second_layer_width,
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height=contact_offset.y)
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# Now add the full active and implant for the NMOS
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# active_offset = nmos_pos + vector(nmos.active_width,0)
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# This might be needed if the spacing between the actives
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# is not satisifed
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# self.add_rect(layer="active",
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# offset=active_offset,
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# width=nmos.active_contact.width,
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# height=nmos.active_height)
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# implant_spacing = self.implant_space+self.implant_enclose_active
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# implant_offset = active_offset + vector(implant_spacing,0) \
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# - vector(0,self.implant_enclose_active)
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# implant_width = nmos.active_contact.width \
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# + 2*self.implant_enclose_active
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# implant_height = nmos.active_height + 2*self.implant_enclose_active
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# self.add_rect(layer="pimplant",
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# offset=implant_offset,
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# width=implant_width,
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# height=implant_height)
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def route_supply_rails(self):
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""" Add vdd/gnd rails to the top and bottom. """
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self.add_layout_pin_rect_center(text="gnd",
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layer=self.route_layer,
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offset=vector(0.5 * self.width, 0),
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width=self.width)
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self.add_layout_pin_rect_center(text="vdd",
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layer=self.route_layer,
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offset=vector(0.5 * self.width, self.height),
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width=self.width)
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def determine_width(self):
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""" Determine the width based on the well contacts (assumed to be on the right side) """
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# It was already set or is left as default (minimum)
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# Width is determined by well contact and spacing and allowing a supply via between each cell
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if self.add_wells:
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width = max(self.nwell_contact.rx(), self.pwell_contact.rx()) + self.m1_space + 0.5 * self.m1_via.width
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# Height is an input parameter, so it is not recomputed.
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else:
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max_active_xoffset = self.find_highest_layer_coords("active").x
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max_route_xoffset = self.find_highest_layer_coords(self.route_layer).x + 0.5 * self.m1_space
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width = max(max_active_xoffset, max_route_xoffset)
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self.width = width
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@staticmethod
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def best_bin(tx_type, target_width):
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"""
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Determine the width transistor that meets the accuracy requirement and is larger than target_width.
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"""
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# Find all of the relavent scaled bins and multiples
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scaled_bins = pgate.scaled_bins(tx_type, target_width)
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for (scaled_width, multiple) in scaled_bins:
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if abs(target_width - scaled_width) / target_width <= 1 - OPTS.accuracy_requirement:
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break
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else:
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debug.error("failed to bin tx size {}, try reducing accuracy requirement".format(target_width), 1)
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debug.info(2, "binning {0} tx, target: {4}, found {1} x {2} = {3}".format(tx_type,
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multiple,
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scaled_width / multiple,
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scaled_width,
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target_width))
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return(scaled_width / multiple, multiple)
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@staticmethod
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def scaled_bins(tx_type, target_width):
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"""
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Determine a set of widths and multiples that could be close to the right size
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sorted by the fewest number of fingers.
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"""
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if tx_type == "nmos":
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bins = nmos_bins[drc("minwidth_poly")]
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elif tx_type == "pmos":
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bins = pmos_bins[drc("minwidth_poly")]
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else:
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debug.error("invalid tx type")
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# Prune out bins that are too big, except for one bigger
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bins = bins[0:bisect_left(bins, target_width) + 1]
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# Determine multiple of target width for each bin
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if len(bins) == 1:
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scaled_bins = [(bins[0], math.ceil(target_width / bins[0]))]
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else:
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scaled_bins = []
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# Add the biggest size as 1x multiple
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scaled_bins.append((bins[-1], 1))
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# Compute discrete multiple of other sizes
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for width in reversed(bins[:-1]):
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multiple = math.ceil(target_width / width)
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scaled_bins.append((multiple * width, multiple))
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return(scaled_bins)
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@staticmethod
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def nearest_bin(tx_type, target_width):
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"""
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Determine the nearest width to the given target_width
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while assuming a single multiple.
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"""
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if tx_type == "nmos":
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bins = nmos_bins[drc("minwidth_poly")]
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elif tx_type == "pmos":
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bins = pmos_bins[drc("minwidth_poly")]
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else:
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debug.error("invalid tx type")
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# Find the next larger bin
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bin_loc = bisect_left(bins, target_width)
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if bin_loc < len(bins):
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return bins[bin_loc]
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else:
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return bins[-1]
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@staticmethod
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def bin_accuracy(ideal_width, width):
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return 1 - abs((ideal_width - width) / ideal_width)
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