mirror of https://github.com/VLSIDA/OpenRAM.git
6c7c6a9fba
The `wire_spice_model()` expects `spice["wire_unit_c"]` in Farads per micrometer squared (F/um²). This is given correctly in the FreePDK45 tech but incorrectly in other technologies. This leads to a huge overestimation of wire capacitance in those technologies, leading to incorrect power values. |
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| .. | ||
| __init__.py | ||
| sky130.lydrc | ||
| sky130.lylvs | ||
| tech.py | ||