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OpenRAM/compiler/bitcells
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Matt Guthaus 69bb245f28 Updates to gdsMill/tech layers 
Create active and poly contact types.
Define standard cell boundary option.
DataType and PurposeLayer are the same. Text must have type 0.
Remove vector from vlsiLayout. More debug in reader.
 		2019-12-04 16:12:53 -08:00
..
bitcell.py Refactor bitcell to bitcell_base. Pep8 format bitcells. 2019-10-06 01:08:23 +00:00
bitcell_1rw_1r.py Refactor bitcell to bitcell_base. Pep8 format bitcells. 2019-10-06 01:08:23 +00:00
bitcell_1w_1r.py Refactor bitcell to bitcell_base. Pep8 format bitcells. 2019-10-06 01:08:23 +00:00
bitcell_base.py Refactor bitcell to bitcell_base. Pep8 format bitcells. 2019-10-06 01:08:23 +00:00
dummy_bitcell.py Refactor bitcell to bitcell_base. Pep8 format bitcells. 2019-10-06 01:08:23 +00:00
dummy_bitcell_1rw_1r.py Refactor bitcell to bitcell_base. Pep8 format bitcells. 2019-10-06 01:08:23 +00:00
dummy_bitcell_1w_1r.py Refactor bitcell to bitcell_base. Pep8 format bitcells. 2019-10-06 01:08:23 +00:00
dummy_pbitcell.py Replica bitcell array with arbitrary RBLs working 2019-07-10 15:56:51 -07:00
pbitcell.py Updates to gdsMill/tech layers 2019-12-04 16:12:53 -08:00
replica_bitcell.py Made all cin function relate to farads and all input_load relate to relative units. 2019-08-08 01:57:04 -07:00
replica_bitcell_1rw_1r.py Made all cin function relate to farads and all input_load relate to relative units. 2019-08-08 01:57:04 -07:00
replica_bitcell_1w_1r.py Made all cin function relate to farads and all input_load relate to relative units. 2019-08-08 01:57:04 -07:00
replica_pbitcell.py Made all cin function relate to farads and all input_load relate to relative units. 2019-08-08 01:57:04 -07:00