Michael Timothy Grimes 6711630463 Altering the routing slightly in the column mux to give the gnd contacts a wider berth. This prevents drc errors when the bitlines are close to the edge of the cell.		2018-11-02 05:59:47 -07:00
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bitcell.py	Merge branch 'multiport' into supply_routing	2018-10-11 09:56:38 -07:00
bitcell_1rw_1r.py	Added gds/sp for scn4m 1rw+1r bitcell. Passes DRC/LVS in both technologies for single and array.	2018-10-26 00:08:13 -07:00
pbitcell.py	Altering the routing slightly in the column mux to give the gnd contacts a wider berth. This prevents drc errors when the bitlines are close to the edge of the cell.	2018-11-02 05:59:47 -07:00
replica_bitcell.py	Move replica bitcells to new bitcells subdir	2018-10-24 09:06:29 -07:00
replica_pbitcell.py	Move replica bitcells to new bitcells subdir	2018-10-24 09:06:29 -07:00