mrg f7e3672c89 Route horizontal supplies in write driver.		2022-03-01 14:37:51 -08:00
..
gds_lib	Route horizontal supplies in write driver.	2022-03-01 14:37:51 -08:00
mag_lib	Rework bitcells.	2020-11-13 10:07:40 -08:00
models	Adjusted vth0 of FF and SS models in scn4m from nominal.	2019-10-07 15:26:20 -07:00
sim_data	Added more data for regression modules.	2021-06-21 17:21:00 -07:00
sp_lib	Rework bitcells.	2020-11-13 10:07:40 -08:00
tech	Do not extract bb (bounding box) layer in SCN4M_SUBM tech file	2022-01-13 14:39:34 -08:00
tf	Add draft lyt file -- connectivity not working	2020-08-14 10:38:22 -07:00
__init__.py	update copyright year.	2021-01-22 11:24:53 -08:00