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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
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5fd484ee5a36bf100816bbf298cd8a2799ea5998
OpenRAM/technology/scn3me_subm
T
History
Hunter Nichols 5dfa8bc2c6 Fixed known typos of the word transition.
2018-09-10 14:27:26 -07:00
..
gds_lib
Finish renaming replica bitcell and bitline pin names.
2018-09-04 14:03:15 -07:00
mag_lib
Convert bounding box layer for SCMOS to bb, gds layer 63.
2018-09-04 13:05:21 -07:00
models
Remove KP from SCMOS models to get rid of ngspice error.
2018-03-01 11:10:04 -08:00
sp_lib
Change internal nets of 6T cell and write driver to have useful names for debugging.
2018-07-26 11:26:47 -07:00
sue_lib
RELEASE 1.0
2016-11-08 09:57:35 -08:00
tech
Fixed known typos of the word transition.
2018-09-10 14:27:26 -07:00
tf
Removed solid display format for comments to allow grid/blockage visibility.
2018-09-04 16:43:59 -07:00
layers.map
RELEASE 1.0
2016-11-08 09:57:35 -08:00
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