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luke
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OpenRAM
mirror of
https://github.com/VLSIDA/OpenRAM.git
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5a6c78865d
OpenRAM
/
technology
/
sky130
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Jesse Cirimelli-Low
5a6c78865d
singleport bitcell array laying out
2023-08-21 19:24:06 -07:00
..
custom
singleport bitcell array laying out
2023-08-21 19:24:06 -07:00
tech
fix single port by using existing custom modules
2023-03-03 14:17:57 -08:00
__init__.py
Update copyright year
2023-01-28 22:56:27 -08:00