mirror of https://github.com/VLSIDA/OpenRAM.git
0250d9add7
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| .. | ||
| base | ||
| bitcells | ||
| characterizer | ||
| custom | ||
| datasheet | ||
| drc | ||
| example_configs | ||
| gdsMill | ||
| modules | ||
| pgates | ||
| riscv | ||
| router | ||
| sram | ||
| tests | ||
| verify | ||
| Makefile | ||
| debug.py | ||
| gen_stimulus.py | ||
| globals.py | ||
| openram.py | ||
| options.py | ||
| run_profile.sh | ||
| sram_factory.py | ||
| view_profile.py | ||