mirror of https://github.com/VLSIDA/OpenRAM.git
22 lines
1.1 KiB
Plaintext
22 lines
1.1 KiB
Plaintext
[globals/init_openram]: Initializing OpenRAM...
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[globals/setup_paths]: Setting up paths...
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[globals/setup_paths]: Temporary files saved in /home/jesse/output/
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[globals/read_config]: Configuration file is /home/jesse/openram/compiler/tests/configs/config.py
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[globals/read_config]: Output saved in /home/jesse/openram/./
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[globals/import_tech]: Importing technology: s8
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[globals/import_tech]: Adding technology path: /home/jesse/openram/technology
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[globals/init_paths]: Creating temp directory: /home/jesse/output/
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[verify/<module>]: Initializing verify...
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[verify/<module>]: Finding DRC/LVS/PEX tools.
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[globals/get_tool]: Finding DRC tool...
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[globals/get_tool]: Using DRC: /usr/local/bin/magic
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[globals/get_tool]: Finding LVS tool...
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[globals/get_tool]: Using LVS: /usr/local/bin/netgen
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[globals/get_tool]: Finding PEX tool...
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[globals/get_tool]: Using PEX: /usr/local/bin/magic
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[characterizer/<module>]: Initializing characterizer...
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[characterizer/<module>]: Analytical model enabled.
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[__main__/runTest]: Checking 1x size inverter
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[pinv/__init__]: creating pinv structure pinv_0 with size of 1
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[pinv/determine_tx_mults]: Height avail 3.4500 PMOS 1.6200 NMOS 1.6200
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