mirror of https://github.com/VLSIDA/OpenRAM.git
81 lines
2.9 KiB
Python
Executable File
81 lines
2.9 KiB
Python
Executable File
#!/usr/bin/env python3
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"""
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Run a regression test on various srams
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"""
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import unittest
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from testutils import header,openram_test
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import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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import debug
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@unittest.skip("SKIPPING 27_worst_case_delay_test")
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class worst_case_timing_sram_test(openram_test):
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def runTest(self):
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OPTS.tech_name = "freepdk45"
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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OPTS.spice_name="hspice"
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OPTS.analytical_delay = False
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OPTS.trim_netlist = False
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OPTS.check_lvsdrc = True
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# This is a hack to reload the characterizer __init__ with the spice version
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from importlib import reload
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import characterizer
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reload(characterizer)
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from characterizer import worst_case
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if not OPTS.spice_exe:
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debug.error("Could not find {} simulator.".format(OPTS.spice_name),-1)
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word_size, num_words, num_banks = 2, 16, 1
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from sram import sram
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from sram_config import sram_config
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c = sram_config(word_size=word_size,
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num_words=num_words,
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num_banks=num_banks)
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c.words_per_row=1
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#c.compute_sizes()
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debug.info(1, "Testing the timing different bitecells inside a {}bit, {} words SRAM with {} bank".format(
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word_size, num_words, num_banks))
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s = sram(c, name="sram1")
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sp_netlist_file = OPTS.openram_temp + "temp.sp"
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s.sp_write(sp_netlist_file)
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if OPTS.use_pex:
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gdsname = OPTS.output_path + s.name + ".gds"
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s.gds_write(gdsname)
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import verify
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reload(verify)
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# Output the extracted design if requested
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sp_pex_file = OPTS.output_path + s.name + "_pex.sp"
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verify.run_pex(s.name, gdsname, sp_netlist_file, output=sp_pex_file)
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sp_sim_file = sp_pex_file
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debug.info(1, "Performing spice simulations with backannotated spice file.")
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else:
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sp_sim_file = sp_netlist_file
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debug.info(1, "Performing spice simulations with spice netlist.")
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corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
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wc = worst_case(s.s, sp_sim_file, corner)
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import tech
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loads = [tech.spice["msflop_in_cap"]*4]
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slews = [tech.spice["rise_time"]*2]
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probe_address = "1" * s.s.addr_size
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probe_data = s.s.word_size - 1
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wc.analyze(probe_address, probe_data, slews, loads)
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globals.end_openram()
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# instantiate a copdsay of the class to actually run the test
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if __name__ == "__main__":
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(OPTS, args) = globals.parse_args()
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del sys.argv[1:]
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header(__file__, OPTS.tech_name)
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unittest.main()
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