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luke
/
OpenRAM
mirror of
https://github.com/VLSIDA/OpenRAM.git
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53c72c6054
OpenRAM
/
compiler
/
bitcells
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Matthew Guthaus
7397f110c5
Add bbox for special DRC rule boundary
2019-12-05 23:14:25 +00:00
..
bitcell.py
…
bitcell_1rw_1r.py
…
bitcell_1w_1r.py
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bitcell_base.py
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dummy_bitcell.py
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dummy_bitcell_1rw_1r.py
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dummy_bitcell_1w_1r.py
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dummy_pbitcell.py
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pbitcell.py
…
replica_bitcell.py
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replica_bitcell_1rw_1r.py
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replica_bitcell_1w_1r.py
…
replica_pbitcell.py
…