mirror of https://github.com/VLSIDA/OpenRAM.git
101 lines
3.7 KiB
Python
Executable File
101 lines
3.7 KiB
Python
Executable File
#!/usr/bin/env python3
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"""
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Run a regression test on various srams
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"""
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import unittest
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from testutils import header,openram_test
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import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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import debug
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class timing_sram_test(openram_test):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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OPTS.spice_name="hspice"
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OPTS.analytical_delay = False
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# This is a hack to reload the characterizer __init__ with the spice version
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from importlib import reload
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import characterizer
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reload(characterizer)
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from characterizer import delay
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if not OPTS.spice_exe:
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debug.error("Could not find {} simulator.".format(OPTS.spice_name),-1)
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import sram
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import tech
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debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank")
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s = sram.sram(word_size=OPTS.word_size,
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num_words=OPTS.num_words,
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num_banks=OPTS.num_banks,
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name="sram1")
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tempspice = OPTS.openram_temp + "temp.sp"
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s.sp_write(tempspice)
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probe_address = "1" * s.s.addr_size
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probe_data = s.s.word_size - 1
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debug.info(1, "Probe address {0} probe data {1}".format(probe_address, probe_data))
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corner = (OPTS.process_corners[0], OPTS.supply_voltages[0], OPTS.temperatures[0])
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d = delay(s.s, tempspice, corner)
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import tech
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loads = [tech.spice["msflop_in_cap"]*4]
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slews = [tech.spice["rise_time"]*2]
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data = d.analyze(probe_address, probe_data, slews, loads)
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if OPTS.tech_name == "freepdk45":
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golden_data = {'leakage_power': 0.0006964536000000001,
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'delay_lh': [0.0573055],
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'read0_power': [0.0337812],
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'read1_power': [0.032946500000000004],
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'write1_power': [0.0361529],
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'write0_power': [0.026179099999999997],
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'slew_hl': [0.0285185],
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'min_period': 0.205,
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'delay_hl': [0.070554],
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'slew_lh': [0.0190073]}
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elif OPTS.tech_name == "scn3me_subm":
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golden_data = {'leakage_power': 0.0004004581,
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'delay_lh': [0.6538954],
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'read0_power': [9.7622],
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'read1_power': [9.589],
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'write1_power': [10.8],
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'write0_power': [6.928400000000001],
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'slew_hl': [0.8321625],
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'min_period': 2.344,
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'delay_hl': [0.9019090999999999],
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'slew_lh': [0.5896232]}
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else:
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self.assertTrue(False) # other techs fail
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# Check if no too many or too few results
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self.assertTrue(len(data.keys())==len(golden_data.keys()))
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# Check each result
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data_matches = True
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for k in data.keys():
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if type(data[k])==list:
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for i in range(len(data[k])):
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if not self.isclose(k,data[k][i],golden_data[k][i],0.15):
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data_matches = False
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else:
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self.isclose(k,data[k],golden_data[k],0.15)
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if not data_matches:
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debug.info(0,str(data))
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self.assertTrue(data_matches)
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globals.end_openram()
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# instantiate a copdsay of the class to actually run the test
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if __name__ == "__main__":
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(OPTS, args) = globals.parse_args()
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del sys.argv[1:]
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header(__file__, OPTS.tech_name)
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unittest.main()
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