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luke
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OpenRAM
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2026-08-29 17:39:02 +02:00
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4c4cfb2a3cbd3ab31877c50765f1ab68b0c67c06
OpenRAM
/
compiler
/
pgates
T
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Matt Guthaus
97c08bce95
Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.
...
Shift s_en buffers even with other cells.
2018-03-23 08:14:09 -07:00
..
pgate.py
Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.
2018-03-23 08:14:09 -07:00
pinv.py
Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.
2018-03-23 08:14:09 -07:00
pinvbuf.py
Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.
2018-03-23 08:14:09 -07:00
pnand2.py
Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.
2018-03-23 08:14:09 -07:00
pnand3.py
Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.
2018-03-23 08:14:09 -07:00
pnor2.py
Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.
2018-03-23 08:14:09 -07:00
ptx.py
Add dffs to control logic. Rename layout pin segment/rect functions for consistency. Redo gnd/vdd pins in control.
2018-03-23 08:14:09 -07:00
