mirror of https://github.com/VLSIDA/OpenRAM.git
90d1fa7c43
Flatten and simplify 1rw 1r bitcell. Move bitcell vias to M3 if rotation is limited. Simplify replica bitcell vdd routing. |
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| .. | ||
| gds_lib | ||
| lib | ||
| sp_lib | ||
| tech | ||
| tf | ||
| layers.map | ||