Logo
Explore Help
Sign In
luke/OpenRAM
Watch 1
Star 0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 01:24:39 +02:00
Code Issues Packages Projects Releases Wiki Activity
Files
410115e8303949d58f9563cce7287f980c362409
OpenRAM/compiler/verify
T
History
Matt Guthaus 831e454b34 Remove redundant DRC run in magic.
2018-11-05 13:30:42 -08:00
..
__init__.py
Add none option for verify wrapper with warning messages.
2018-09-11 10:17:24 -07:00
assura.py
Add DRC/LVS/PEX statistics in verbose=1 mode
2018-07-11 11:59:24 -07:00
calibre.py
Supply router working, perhaps not efficiently though.
2018-10-05 15:57:34 -07:00
magic.py
Remove redundant DRC run in magic.
2018-11-05 13:30:42 -08:00
none.py
Add none option for verify wrapper with warning messages.
2018-09-11 10:17:24 -07:00
Powered by Gitea Version: 1.27.2 Page: 3647ms Template: 33ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API