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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
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3ea003c367e64d5c85aec0586eee51cfe765fa32
OpenRAM/compiler/tests/golden
T
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Matt Guthaus 857b997367 Modify LEF output to have all capital LAYER. Remove extra space before new lines.
2017-08-15 08:21:54 -07:00
..
sram_2_16_1_freepdk45_analytical.lib
Improved characterizer.
2017-07-06 08:42:25 -07:00
sram_2_16_1_freepdk45.lef
Modify LEF output to have all capital LAYER. Remove extra space before new lines.
2017-08-15 08:21:54 -07:00
sram_2_16_1_freepdk45.lib
Fix LEF mismatch due to path/wire hierarchy change. Add characterizer feasible delay/slew check. Update delay tests with new delays.
2017-08-07 10:24:45 -07:00
sram_2_16_1_freepdk45.sp
RELEASE 1.0
2016-11-08 09:57:35 -08:00
sram_2_16_1_freepdk45.v
RELEASE 1.0
2016-11-08 09:57:35 -08:00
sram_2_16_1_scn3me_subm_analytical.lib
Improved characterizer.
2017-07-06 08:42:25 -07:00
sram_2_16_1_scn3me_subm.lef
Modify LEF output to have all capital LAYER. Remove extra space before new lines.
2017-08-15 08:21:54 -07:00
sram_2_16_1_scn3me_subm.lib
Fix LEF mismatch due to path/wire hierarchy change. Add characterizer feasible delay/slew check. Update delay tests with new delays.
2017-08-07 10:24:45 -07:00
sram_2_16_1_scn3me_subm.sp
RELEASE 1.0
2016-11-08 09:57:35 -08:00
sram_2_16_1_scn3me_subm.v
RELEASE 1.0
2016-11-08 09:57:35 -08:00
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