mirror of https://github.com/VLSIDA/OpenRAM.git
DRC/LVS passing for all parameterized gates. Magic and GDS match for SCMOS rules again. |
||
|---|---|---|
| .. | ||
| gds_lib | ||
| mag_lib | ||
| sp_lib | ||
| sue_lib | ||
| tech | ||
| layers.map | ||
DRC/LVS passing for all parameterized gates. Magic and GDS match for SCMOS rules again. |
||
|---|---|---|
| .. | ||
| gds_lib | ||
| mag_lib | ||
| sp_lib | ||
| sue_lib | ||
| tech | ||
| layers.map | ||