mirror of https://github.com/VLSIDA/OpenRAM.git
98 lines
3.4 KiB
Python
98 lines
3.4 KiB
Python
#!/usr/bin/env python2.7
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"""
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Run a regresion test on various srams
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"""
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import unittest
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from testutils import header,isclose
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import sys,os
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sys.path.append(os.path.join(sys.path[0],".."))
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import globals
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from globals import OPTS
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import debug
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class timing_sram_test(unittest.TestCase):
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def runTest(self):
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globals.init_openram("config_20_{0}".format(OPTS.tech_name))
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OPTS.check_lvsdrc = False
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OPTS.spice_name="hspice"
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OPTS.analytical_delay = False
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# This is a hack to reload the characterizer __init__ with the spice version
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import characterizer
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reload(characterizer)
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from characterizer import delay
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if not OPTS.spice_exe:
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self.error("Could not find {} simulator.".format(OPTS.spice_name))
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self.assertTrue(OPTS.spice_exe)
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import sram
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debug.info(1, "Testing timing for sample 1bit, 16words SRAM with 1 bank")
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s = sram.sram(word_size=OPTS.word_size,
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num_words=OPTS.num_words,
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num_banks=OPTS.num_banks,
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name="sram1")
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OPTS.check_lvsdrc = True
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tempspice = OPTS.openram_temp + "temp.sp"
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s.sp_write(tempspice)
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probe_address = "1" * s.addr_size
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probe_data = s.word_size - 1
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debug.info(1, "Probe address {0} probe data {1}".format(probe_address, probe_data))
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d = delay.delay(s,tempspice)
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import tech
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loads = [tech.spice["FF_in_cap"]*4]
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slews = [tech.spice["rise_time"]*2]
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data = d.analyze(probe_address, probe_data,slews,loads)
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if OPTS.tech_name == "freepdk45":
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golden_data = {'read1_power': 0.0296933,
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'read0_power': 0.029897899999999998,
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'write0_power': 0.0258029,
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'delay1': [0.049100700000000004],
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'delay0': [0.13766139999999996],
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'min_period': 0.322,
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'write1_power': 0.0260398,
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'slew0': [0.0265264],
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'slew1': [0.0195507]}
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elif OPTS.tech_name == "scn3me_subm":
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golden_data = {'read1_power': 4.443,
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'read0_power': 4.4712,
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'write0_power': 3.0032,
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'delay1': [0.8596608],
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'delay0': [1.9534000000000002],
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'min_period': 5.625,
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'write1_power': 2.8086,
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'slew0': [1.2982],
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'slew1': [0.9909933]}
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else:
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self.assertTrue(False) # other techs fail
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# Check if no too many or too few results
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self.assertTrue(len(data.keys())==len(golden_data.keys()))
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# Check each result
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for k in data.keys():
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if type(data[k])==list:
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for i in range(len(data[k])):
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self.assertTrue(isclose(data[k][i],golden_data[k][i],0.15))
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else:
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self.assertTrue(isclose(data[k],golden_data[k],0.15))
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# reset these options
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OPTS.check_lvsdrc = True
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OPTS.analytical_delay = True
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reload(characterizer)
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globals.end_openram()
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# instantiate a copdsay of the class to actually run the test
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if __name__ == "__main__":
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(OPTS, args) = globals.parse_args()
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del sys.argv[1:]
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header(__file__, OPTS.tech_name)
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unittest.main()
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