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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
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29880a0b5aa55dc1efc2e5adb90a8b562872f690
OpenRAM/compiler/verify
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mrg bad735fd89 Uncomment flatten as it is neeeded for correct extraction
2020-12-17 15:24:44 -08:00
..
__init__.py
Temp comment Magic GDS filter code.
2020-11-10 13:37:18 -08:00
assura.py
Output DRC and LVS run files to output directory.
2020-11-09 11:12:31 -08:00
calibre.py
Fix copy gds/sp error with new relative paths
2020-12-11 10:22:35 -08:00
magic.py
Uncomment flatten as it is neeeded for correct extraction
2020-12-17 15:24:44 -08:00
none.py
Use readspice to define ports from sp netlist in Magic extract.
2020-11-10 17:06:24 -08:00
run_script.py
Decrease verbosity of script output
2020-12-01 17:12:17 -08:00
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