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OpenRAM/compiler/sram
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Bugra Onal 289f48c3f3 Merge branch 'multibank' of github.com:VLSIDA/PrivateRAM into multibank 2022-07-08 14:23:05 -07:00
..
sram.py Multibank file generation (messy) 2022-07-08 13:51:07 -07:00
sram_1bank.py Replaced instances of addr_size with bank_addr 2022-07-08 13:55:02 -07:00
sram_base.py Replaced instances of addr_size with bank_addr 2022-07-08 13:55:02 -07:00
sram_config.py Replaced instances of addr_size with bank_addr 2022-07-08 13:55:02 -07:00
sram_multibank.py Replaced instances of addr_size with bank_addr 2022-07-08 13:55:02 -07:00
sram_multibank_template.v Added conditional sections to template 2022-07-08 13:51:07 -07:00