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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-30 18:02:23 +02:00
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1acc6be3ce12f483c9467393c2f310d687ff84fb
OpenRAM/compiler/sram
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samuelkcrow 1acc6be3ce call create() function from sram/__init__
2022-03-02 16:38:39 -08:00
..
sram_1bank.py
Add extra dnwell spacing for single port
2021-06-23 11:14:58 -07:00
sram_2bank.py
Update copyright year.
2021-01-22 11:23:28 -08:00
sram_base.py
Initial work on separate delay and func simulation
2022-02-16 10:54:39 -08:00
sram_config.py
Initial work on separate delay and func simulation
2022-02-16 10:54:39 -08:00
sram.py
call create() function from sram/__init__
2022-03-02 16:38:39 -08:00
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