mirror of https://github.com/VLSIDA/OpenRAM.git
34 lines
1.1 KiB
Python
34 lines
1.1 KiB
Python
#!/usr/bin/env python3
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# See LICENSE for licensing information.
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#
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# Copyright (c) 2016-2021 Regents of the University of California
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# All rights reserved.
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#
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import debug
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from base import design
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from base import get_libcell_size
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from tech import layer, GDS
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class sky130_internal(design):
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def __init__(self, version, name=""):
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super().__init__(name)
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if version == "wlstrap":
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self.name = "sky130_fd_bd_sram__sram_sp_wlstrap"
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elif version == "wlstrap_p":
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self.name = "sky130_fd_bd_sram__sram_sp_wlstrap_p"
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elif version == "wlstrapa":
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self.name = "sky130_fd_bd_sram__sram_sp_wlstrapa"
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elif version == "wlstrapa_p":
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self.name = "sky130_fd_bd_sram__sram_sp_wlstrapa_p"
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else:
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debug.error("Invalid version", -1)
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design.__init__(self, name=self.name)
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(self.width, self.height) = get_libcell_size(self.name,
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GDS["unit"],
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layer["mem"])
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# pin_map = get_libcell_pins(pin_names, self.name, GDS["unit"])
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