OpenRAM

mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-30 09:58:33 +02:00

Files

T

use names provided by the tech file, which can be overriden by the
technology.

Signed-off-by: Bastian Koppelmann <[email protected]>

2020-02-12 15:37:51 +01:00

bitcell_1rw_1r.py

2020-02-12 15:37:51 +01:00

bitcell_1w_1r.py

2020-02-12 15:37:51 +01:00

bitcell_base.py

2019-10-06 01:08:23 +00:00

bitcell.py

2020-02-12 15:37:51 +01:00

dummy_bitcell_1rw_1r.py

2020-02-12 15:37:51 +01:00

dummy_bitcell_1w_1r.py

2020-02-12 15:37:51 +01:00

dummy_bitcell.py

2020-02-12 15:37:51 +01:00

dummy_pbitcell.py

2019-12-05 23:14:25 +00:00

pbitcell.py

Cleanup and rename vias.

2020-01-30 01:45:33 +00:00

replica_bitcell_1rw_1r.py

2020-02-12 15:37:51 +01:00

replica_bitcell_1w_1r.py

2020-02-12 15:37:51 +01:00

replica_bitcell.py

2020-02-12 15:37:51 +01:00

replica_pbitcell.py

2019-12-05 23:14:25 +00:00