mirror of https://github.com/VLSIDA/OpenRAM.git
451 lines
18 KiB
Python
451 lines
18 KiB
Python
import gdsMill
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import tech
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from contact import contact
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import math
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import debug
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from globals import OPTS
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from pin_layout import pin_layout
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from vector import vector
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from vector3d import vector3d
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from router import router
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from direction import direction
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class supply_router(router):
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"""
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A router class to read an obstruction map from a gds and
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routes a grid to connect the supply on the two layers.
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"""
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def __init__(self, layers, design, gds_filename=None):
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"""
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This will route on layers in design. It will get the blockages from
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either the gds file name or the design itself (by saving to a gds file).
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"""
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router.__init__(self, layers, design, gds_filename)
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# The list of supply rails that may be routed
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self.supply_rails = []
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# This is the same as above but the sets of pins
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self.supply_rail_tracks = {}
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self.supply_rail_wire_tracks = {}
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# Power rail width in grid units.
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self.rail_track_width = 2
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def create_routing_grid(self):
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"""
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Create a sprase routing grid with A* expansion functions.
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"""
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size = self.ur - self.ll
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debug.info(1,"Size: {0} x {1}".format(size.x,size.y))
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import supply_grid
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self.rg = supply_grid.supply_grid(self.ll, self.ur, self.track_width)
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def route(self, vdd_name="vdd", gnd_name="gnd"):
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"""
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Add power supply rails and connect all pins to these rails.
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"""
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debug.info(1,"Running supply router on {0} and {1}...".format(vdd_name, gnd_name))
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self.vdd_name = vdd_name
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self.gnd_name = gnd_name
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# Clear the pins if we have previously routed
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if (hasattr(self,'rg')):
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self.clear_pins()
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else:
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# Creat a routing grid over the entire area
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# FIXME: This could be created only over the routing region,
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# but this is simplest for now.
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self.create_routing_grid()
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# Get the pin shapes
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self.find_pins_and_blockages([self.vdd_name, self.gnd_name])
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#self.write_debug_gds("pin_enclosures.gds",stop_program=True)
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# Add the supply rails in a mesh network and connect H/V with vias
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# Block everything
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self.prepare_blockages(self.gnd_name)
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# Determine the rail locations
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self.route_supply_rails(self.gnd_name,0)
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# Block everything
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self.prepare_blockages(self.vdd_name)
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# Determine the rail locations
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self.route_supply_rails(self.vdd_name,1)
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#self.write_debug_gds("pre_pin_debug.gds",stop_program=True)
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remaining_vdd_pin_indices = self.route_simple_overlaps(vdd_name)
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remaining_gnd_pin_indices = self.route_simple_overlaps(gnd_name)
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# Route the supply pins to the supply rails
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# Route vdd first since we want it to be shorter
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self.route_pins_to_rails(vdd_name, remaining_vdd_pin_indices)
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self.route_pins_to_rails(gnd_name, remaining_gnd_pin_indices)
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self.write_debug_gds("post_pin_debug.gds",stop_program=False)
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return True
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def route_simple_overlaps(self, pin_name):
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"""
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This checks for simple cases where a pin component already overlaps a supply rail.
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It will add an enclosure to ensure the overlap in wide DRC rule cases.
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"""
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num_components = self.num_pin_components(pin_name)
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remaining_pins = []
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supply_tracks = self.supply_rail_tracks[pin_name]
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for index in range(num_components):
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pin_in_tracks = self.pin_grids[pin_name][index]
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common_set = supply_tracks & pin_in_tracks
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if len(common_set)==0:
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# if no overlap, add it to the complex route pins
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remaining_pins.append(index)
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else:
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print("Overlap!",index)
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self.create_simple_overlap_enclosure(pin_name, common_set)
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return remaining_pins
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def recurse_simple_overlap_enclosure(self, pin_name, start_set, direct):
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"""
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Recursive function to return set of tracks that connects to
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the actual supply rail wire in a given direction (or terminating
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when any track is no longer in the supply rail.
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"""
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import grid_utils
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next_set = grid_utils.expand_border(start_set, direct)
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supply_tracks = self.supply_rail_tracks[pin_name]
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supply_wire_tracks = self.supply_rail_wire_tracks[pin_name]
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supply_overlap = next_set & supply_tracks
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wire_overlap = next_set & supply_wire_tracks
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print("EXAMINING: ",start_set,len(start_set),len(supply_overlap),len(wire_overlap),direct)
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# If the rail overlap is the same, we are done, since we connected to the actual wire
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if len(wire_overlap)==len(start_set):
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print("HIT RAIL", wire_overlap)
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new_set = start_set | wire_overlap
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# If the supply overlap is the same, keep expanding unti we hit the wire or move out of the rail region
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elif len(supply_overlap)==len(start_set):
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print("RECURSE", supply_overlap)
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recurse_set = self.recurse_simple_overlap_enclosure(pin_name, supply_overlap, direct)
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new_set = start_set | supply_overlap | recurse_set
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else:
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# If we got no next set, we are done, can't expand!
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print("NO MORE OVERLAP", supply_overlap)
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new_set = set()
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return new_set
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def create_simple_overlap_enclosure(self, pin_name, start_set):
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"""
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This takes a set of tracks that overlap a supply rail and creates an enclosure
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that is ensured to overlap the supply rail wire.
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It then adds rectangle(s) for the enclosure.
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"""
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import grid_utils
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additional_set = set()
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# Check the layer of any element in the pin to determine which direction to route it
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e = next(iter(start_set))
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new_set = start_set.copy()
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if e.z==0:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.NORTH)
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if not new_set:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.SOUTH)
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else:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.EAST)
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if not new_set:
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new_set = self.recurse_simple_overlap_enclosure(pin_name, start_set, direction.WEST)
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enclosure_list = self.compute_enclosures(new_set)
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for pin in enclosure_list:
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debug.info(2,"Adding simple overlap enclosure {0} {1}".format(pin_name, pin))
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self.cell.add_rect(layer=pin.layer,
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offset=pin.ll(),
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width=pin.width(),
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height=pin.height())
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def connect_supply_rails(self, name):
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"""
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Determine which supply rails overlap and can accomodate a via.
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Remove any supply rails that do not have a via since they are disconnected.
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NOTE: It is still possible though unlikely that there are disconnected groups of rails.
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"""
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# Split into horizontal and vertical paths
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vertical_rails = [x for x in self.supply_rails if x[0][0].z==1 and x.name==name]
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horizontal_rails = [x for x in self.supply_rails if x[0][0].z==0 and x.name==name]
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# Flag to see if each supply rail has at least one via (i.e. it is "connected")
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vertical_flags = [False] * len(vertical_rails)
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horizontal_flags = [False] * len(horizontal_rails)
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# Compute a list of "shared areas" that are bigger than a via
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via_areas = []
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for vindex,v in enumerate(vertical_rails):
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for hindex,h in enumerate(horizontal_rails):
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# Compute the overlap of the two paths, None if no overlap
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overlap = v.overlap(h)
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if overlap:
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(ll,ur) = overlap
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# We can add a via only if it is a full track width in each dimension
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if ur.x-ll.x >= self.rail_track_width-1 and ur.y-ll.y >= self.rail_track_width-1:
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vertical_flags[vindex]=True
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horizontal_flags[hindex]=True
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via_areas.append(overlap)
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# Go through and add the vias at the center of the intersection
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for (ll,ur) in via_areas:
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center = (ll + ur).scale(0.5,0.5,0)
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self.add_via(center,self.rail_track_width)
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# Retrieve the original indices into supply_rails for removal
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remove_hrails = [rail for flag,rail in zip(horizontal_flags,horizontal_rails) if not flag]
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remove_vrails = [rail for flag,rail in zip(vertical_flags,vertical_rails) if not flag]
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for rail in remove_hrails + remove_vrails:
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debug.info(1,"Removing disconnected supply rail {0} .. {1}".format(rail[0][0],rail[-1][-1]))
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self.supply_rails.remove(rail)
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def add_supply_rails(self, name):
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"""
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Add the shapes that represent the routed supply rails.
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This is after the paths have been pruned and only include rails that are
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connected with vias.
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"""
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for wave_path in self.supply_rails:
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if wave_path.name == name:
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self.add_wavepath(name, wave_path)
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def compute_supply_rail_dimensions(self):
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"""
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Compute the supply rail dimensions including wide metal spacing rules.
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"""
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self.max_yoffset = self.rg.ur.y
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self.max_xoffset = self.rg.ur.x
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# Longest length is conservative
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rail_length = max(self.max_yoffset,self.max_xoffset)
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# Convert the number of tracks to dimensions to get the design rule spacing
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rail_width = self.track_width*self.rail_track_width
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# Get the conservative width and spacing of the top rails
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(horizontal_width, horizontal_space) = self.get_layer_width_space(0, rail_width, rail_length)
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(vertical_width, vertical_space) = self.get_layer_width_space(1, rail_width, rail_length)
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width = max(horizontal_width, vertical_width)
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space = max(horizontal_space, vertical_space)
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# This is the supply rail pitch in terms of routing grids
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# i.e. a rail of self.rail_track_width needs this many tracks including
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# space
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track_pitch = self.rail_track_width*width + space
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# Determine the pitch (in tracks) of the rail wire + spacing
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self.supply_rail_width = math.ceil(track_pitch/self.track_width)
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debug.info(1,"Rail step: {}".format(self.supply_rail_width))
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# Conservatively determine the number of tracks that the rail actually occupies
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space_tracks = math.ceil(space/self.track_width)
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self.supply_rail_wire_width = self.supply_rail_width - space_tracks
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debug.info(1,"Rail wire tracks: {}".format(self.supply_rail_wire_width))
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total_space = self.supply_rail_width - self.supply_rail_wire_width
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debug.check(total_space % 2 == 0, "Asymmetric wire track spacing...")
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self.supply_rail_space_width = int(0.5*total_space)
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debug.info(1,"Rail space tracks: {} (on both sides)".format(self.supply_rail_space_width))
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def compute_supply_rails(self, name, supply_number):
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"""
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Compute the unblocked locations for the horizontal and vertical supply rails.
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Go in a raster order from bottom to the top (for horizontal) and left to right
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(for vertical). Start with an initial start_offset in x and y direction.
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"""
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start_offset = supply_number*self.supply_rail_width
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# Horizontal supply rails
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for offset in range(start_offset, self.max_yoffset, 2*self.supply_rail_width):
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# Seed the function at the location with the given width
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wave = [vector3d(0,offset+i,0) for i in range(self.supply_rail_width)]
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# While we can keep expanding east in this horizontal track
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while wave and wave[0].x < self.max_xoffset:
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wave = self.find_supply_rail(name, wave, direction.EAST)
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# Vertical supply rails
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max_offset = self.rg.ur.x
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for offset in range(start_offset, self.max_xoffset, 2*self.supply_rail_width):
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# Seed the function at the location with the given width
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wave = [vector3d(offset+i,0,1) for i in range(self.supply_rail_width)]
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# While we can keep expanding north in this vertical track
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while wave and wave[0].y < self.max_yoffset:
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wave = self.find_supply_rail(name, wave, direction.NORTH)
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def find_supply_rail(self, name, seed_wave, direct):
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"""
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This finds the first valid starting location and routes a supply rail
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in the given direction.
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It returns the space after the end of the rail to seed another call for multiple
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supply rails in the same "track" when there is a blockage.
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"""
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# Sweep to find an initial unblocked valid wave
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start_wave = self.rg.find_start_wave(seed_wave, len(seed_wave), direct)
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if not start_wave:
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return None
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# Expand the wave to the right
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wave_path = self.rg.probe(start_wave, direct)
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if not wave_path:
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return None
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# We must have at least 2 tracks to drop plus 2 tracks for a via
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if len(wave_path)>=4*self.rail_track_width:
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# drop the first and last steps to leave escape routing room
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# around the blockage that stopped the probe
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# except, don't drop the first if it is the first in a row/column
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if (direct==direction.NORTH and seed_wave[0].y>0):
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wave_path.trim_first()
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elif (direct == direction.EAST and seed_wave[0].x>0):
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wave_path.trim_first()
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wave_path.trim_last()
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wave_path.name = name
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self.supply_rails.append(wave_path)
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# seed the next start wave location
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wave_end = wave_path[-1]
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return wave_path.neighbor(direct)
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def route_supply_rails(self, name, supply_number):
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"""
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Route the horizontal and vertical supply rails across the entire design.
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Must be done with lower left at 0,0
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"""
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# Compute the grid dimensions
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self.compute_supply_rail_dimensions()
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# Compute the grid locations of the supply rails
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self.compute_supply_rails(name, supply_number)
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# Add the supply rail vias (and prune disconnected rails)
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self.connect_supply_rails(name)
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# Add the rails themselves
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self.add_supply_rails(name)
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# Make the supply rails into a big giant set of grids
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self.create_supply_track_set(name)
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def create_supply_track_set(self, pin_name):
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"""
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Take the remaining supply rails and put the middle grids into a set.
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The middle grids will be guaranteed to have the wire.
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FIXME: Do this instead with the supply_rail_pitch and width
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"""
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rail_set = set()
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wire_set = set()
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for rail in self.supply_rails:
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if rail.name != pin_name:
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continue
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# FIXME: Select based on self.supply_rail_wire_width and self.supply_rail_width
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start_wire_index = self.supply_rail_space_width
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end_wire_index = self.supply_rail_width - self.supply_rail_space_width
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for wave_index in range(len(rail)):
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rail_set.update(rail[wave_index])
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wire_set.update(rail[wave_index][start_wire_index:end_wire_index])
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self.supply_rail_tracks[pin_name] = rail_set
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self.supply_rail_wire_tracks[pin_name] = wire_set
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def route_pins_to_rails(self, pin_name, remaining_component_indices):
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"""
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This will route each of the remaining pin components to the supply rails.
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After it is done, the cells are added to the pin blockage list.
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"""
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debug.info(1,"Pin {0} has {1} remaining components to route.".format(pin_name,
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len(remaining_component_indices)))
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recent_paths = []
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# For every component
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for index in remaining_component_indices:
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debug.info(2,"Routing component {0} {1}".format(pin_name, index))
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self.rg.reinit()
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self.prepare_blockages(pin_name)
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# Add the single component of the pin as the source
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# which unmarks it as a blockage too
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self.add_pin_component_source(pin_name,index)
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# Add all of the rails as targets
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# Don't add the other pins, but we could?
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self.add_supply_rail_target(pin_name)
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# Add the previous paths as targets too
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#self.add_path_target(recent_paths)
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#print(self.rg.target)
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# Actually run the A* router
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if not self.run_router(detour_scale=5):
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self.write_debug_gds()
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recent_paths.append(self.paths[-1])
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def add_supply_rail_target(self, pin_name):
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"""
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Add the supply rails of given name as a routing target.
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"""
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debug.info(2,"Add supply rail target {}".format(pin_name))
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for rail in self.supply_rails:
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if rail.name != pin_name:
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continue
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# Set the middle track only as the target since wide metal
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# spacings may mean the other grids are actually empty space
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middle_index = math.floor(len(rail[0])/2)
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for wave_index in range(len(rail)):
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pin_in_tracks = rail[wave_index]
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#debug.info(1,"Set target: " + str(pin_name) + " " + str(pin_in_tracks))
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self.rg.set_target(pin_in_tracks[middle_index])
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self.rg.set_blocked(pin_in_tracks,False)
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def set_supply_rail_blocked(self, value=True):
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"""
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Add the supply rails of given name as a routing target.
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"""
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debug.info(3,"Blocking supply rail")
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for rail in self.supply_rails:
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for wave_index in range(len(rail)):
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pin_in_tracks = rail[wave_index]
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#debug.info(1,"Set target: " + str(pin_name) + " " + str(pin_in_tracks))
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self.rg.set_blocked(pin_in_tracks,value)
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