mirror of https://github.com/VLSIDA/OpenRAM.git
13 lines
632 B
Plaintext
13 lines
632 B
Plaintext
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.inc '$PDK_DIR/ncsu_basekit/models/hspice/tran_models/models_nom/NMOS_VTG.inc
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.inc '$PDK_DIR/ncsu_basekit/models/hspice/tran_models/models_nom/PMOS_VTG.inc
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.inc '$PDK_DIR/ncsu_basekit/models/hspice/tran_models/models_nom/NMOS_VTL.inc
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.inc '$PDK_DIR/ncsu_basekit/models/hspice/tran_models/models_nom/PMOS_VTL.inc
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.inc '$PDK_DIR/ncsu_basekit/models/hspice/tran_models/models_nom/NMOS_VTH.inc
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.inc '$PDK_DIR/ncsu_basekit/models/hspice/tran_models/models_nom/PMOS_VTH.inc
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.inc '$PDK_DIR/ncsu_basekit/models/hspice/tran_models/models_nom/NMOS_THKOX.inc
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.inc '$PDK_DIR/ncsu_basekit/models/hspice/tran_models/models_nom/PMOS_THKOX.inc
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