Sam Crow 5907cbb3e2 remove pins overwrite from contact class

2023-07-18 16:12:42 -07:00

..

__init__.py

Verilog ROM model created for testing

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channel_route.py

Update copyright year

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contact.py

remove pins overwrite from contact class

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delay_data.py

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design.py

change pins to OrderedDict

2023-07-17 15:22:35 -07:00

errors.py

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geometry.py

get connections from spice objects in instances

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hierarchy_design.py

get connections from spice objects in instances

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hierarchy_layout.py

rom base passing tests with top level routing

2023-03-30 11:30:50 -07:00

hierarchy_spice.py

fix circular import with pin and net

2023-07-18 11:28:30 -07:00

lef.py

implement pin_spice object

2023-07-13 16:45:05 -07:00

logical_effort.py

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pin_layout.py

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power_data.py

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2023-01-28 22:56:27 -08:00

rom_verilog.py

Fixed formatting on all files

2023-06-14 12:28:36 -07:00

route.py

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timing_graph.py

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utils.py

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vector3d.py

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vector.py

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verilog.py

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wire_path.py

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wire_spice_model.py

add fixme note for unit conversion

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wire.py

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