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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
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01244347c1c2b8ccc6b4501c4678d2f1efb210cc
OpenRAM/technology/freepdk45/tech
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Matt Guthaus 9d1f31467e Move internal power to clock pin. Differentiate leakge power when CSb is high.
2018-02-23 12:21:32 -08:00
..
__init__.py
Remove dead code ptx_port.
2018-01-19 16:19:05 -08:00
tech.py
Move internal power to clock pin. Differentiate leakge power when CSb is high.
2018-02-23 12:21:32 -08:00
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