luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
2,404 Commits 4 Branches 63 Tags 78 MiB
Commit Graph

648 Commits

Author SHA1 Message Date
mrg 8ece411954 Merge branch 'dev' into tech_migration 2020-04-16 11:32:02 -07:00
mrg 2e67d44cd7 First pass of multiple bitcells per decoder row 2020-04-10 13:29:41 -07:00
mrg 7888e54fc4 Remove dynamic bitcell multiple detection. 
Check for decoder bitcell multiple in tech file or assume 1.
PEP8 fixes.
 2020-04-09 11:38:18 -07:00
mrg 58fbc5351a Change rows to outputs in hierarchical decoder 2020-04-08 17:05:16 -07:00
mrg 7872b6a68c Merge branch 'dev' into tech_migration 2020-04-07 10:42:05 -07:00
mrg cd8dc8e20b Output lvs model instead of spice model 2020-04-06 14:08:38 -07:00
mrg a12b5d9e6c Split decoder pbitcell tests 2020-04-06 13:31:31 -07:00
mrg f358de78bb Add optional lvs_lib netlists for LVS usage (sp_lib is for simulation) 2020-04-03 13:39:54 -07:00
mrg f105c9ab36 Netlist only in verilog test 2020-04-02 12:43:19 -07:00
mrg 1d5e5e3607 Don't run lvs/drc or route supplies in verilog test 2020-04-02 12:42:28 -07:00
mrg a3683c5898 Separate pbitcell from hierarchical decoder 2020-04-01 16:39:47 -07:00
mrg 3e41664db6 Split precharge array to multiport and normal cell 2020-04-01 11:26:31 -07:00
mrg da334e47aa Separate pbitcell tests for precharge 2020-04-01 11:14:50 -07:00
Joey Kunzler b0d2946c80 update to sense amp and write driver modules 2020-03-30 20:00:32 -07:00
mrg c15b4167b6 Merge branch 'dev' into tech_migration 2020-03-23 11:57:03 -07:00
mrg f21791a904 Add source drain contact options to ptx. 2020-03-23 11:36:45 -07:00
mrg fd7af7fc25 Matt sucks skip test 2020-03-06 15:03:31 -08:00
mrg 5aed893725 Add nwell/pwell tap test 2020-02-03 18:41:06 +00:00
Matt Guthaus b7d78ec2ec Fix ptx active contact orientation to non-default M1 direction. 2019-12-19 12:54:10 -08:00
Matthew Guthaus fc4685c7f7 Cleanup. 2019-12-17 23:07:01 +00:00
Matthew Guthaus 449b0a7c28 Make wire test programmatic 2019-12-17 22:36:38 +00:00
Matt Guthaus ed28b4983b Clean up and generalize layer rules. 
Convert metalN to mN.
Generalize helper constants in modules for
space, width, enclose, etc.
Use layer stacks whever possible.
Try to remove drc() calls in liu of helper constants.
 2019-12-17 11:03:36 -08:00
Matt Guthaus d3a2c46cb9 Remove some contact tests 2019-12-16 17:15:29 -08:00
Matt Guthaus 6058af994c Fix ignore gds files 2019-12-16 15:39:32 -08:00
Matt Guthaus 3eb0dad06a Remove cells from DRC/LVS in the blackbox tech list. 2019-12-16 15:33:30 -08:00
Matt Guthaus e143a6033f Use layer stacks from tech file in design class and throughout 2019-12-13 14:13:41 -08:00
Matt Guthaus e048ada23c Abstract basic DRC checks 2019-12-11 17:56:55 -08:00
Matthew Guthaus 8f473b26a9 Add replica bitcell test for 1 port 2019-12-05 01:14:06 +00:00
Matthew Guthaus d519c00aa1 Fix contact order in test 2019-12-05 01:06:31 +00:00
Matt Guthaus 7b9e7ff35b Nominal corner only for sim tests. Netlist only for speed. 2019-11-30 12:48:25 -08:00
Matt Guthaus 6ef1b6a4ec Blackbox option for DRC waivers 2019-11-29 15:50:32 -08:00
Matt Guthaus 2a912dab7a Remove unused config files 2019-11-29 12:35:35 -08:00
Matt Guthaus 0cdd3af1aa Change default nominal corners to false and enable in test config. 2019-11-29 12:08:53 -08:00
Matt Guthaus d511f648c6 Move DRC/LVS/PEX tools to tech file. 2019-11-29 12:01:33 -08:00
Matt Guthaus f4599b7121 Default tools are calibre except for SCMOS 2019-11-26 13:23:18 -08:00
Matt Guthaus 190c5a078e Fix permissions on pwrite_driver test 2019-11-20 11:49:39 -08:00
Matt Guthaus 3364f47e56 Fix wrong supply voltage in config files. 2019-11-20 09:50:27 -08:00
Matthew Guthaus cdf01c6c23 Fix test 30 for generic configs 2019-11-17 00:49:38 +00:00
Matthew Guthaus b3fb4e3183 Make unit test configs generic to tech_name 2019-11-17 00:44:31 +00:00
Matthew Guthaus b3b3cf0210 Merge remote-tracking branch 'origin/dev' into tech_migration 2019-11-17 00:15:18 +00:00
Matthew Guthaus aca99b87bc Fix config for tests 30 2019-11-16 22:22:30 +00:00
Matthew Guthaus c4cf8134fe Undo changes for config expansion. Change unit tests to use OPENRAM_HOME. 2019-11-15 18:47:59 +00:00
Aditi Sinha 2c7aa5d0da Non-power of 2 address decode tentative 2019-11-15 03:59:57 +00:00
Matthew Guthaus 04af5480d2 Add skeleton files for pwrite_driver 2019-10-30 21:34:03 +00:00
Matt Guthaus 764d4da1bd Clean up config file organization. Improve gdsMill debug output. 2019-10-23 10:48:18 -07:00
Hunter Nichols b420f77ff1 Updated leakage power golden data in hspice delay test. 2019-10-01 15:26:34 -07:00
Hunter Nichols 19a09470d4 Merged with dev, conflict in golden data of hspice delay test. 2019-10-01 14:26:34 -07:00
Hunter Nichols 7b029a4582 Updated golden values in delay tests due to model changes. 2019-09-30 14:02:00 -07:00
Matt Guthaus b0dcfb5b2d Fix leakage mismatch in results. 2019-09-27 15:14:01 -07:00
Matt Guthaus 585ce63dff Removing unused tech parms. Simplifying redundant parms. 2019-09-04 16:08:18 -07:00