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OpenRAM
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1713 Commits

Author SHA1 Message Date
Matt Guthaus bfca51f734 Fix flatten work-around code to have new circuit names 2019-01-18 09:51:52 -08:00
Hunter Nichols 5885e3b635 Removed carriage returns, adjusted signal names generation for variable delay chain size. 2019-01-18 00:23:50 -08:00
Yusu Wang c20fb2a70e replace matrix to array 2019-01-17 12:01:08 -08:00
Hunter Nichols 4ced6be6bd Added data collection and some initial data 2019-01-17 09:54:34 -08:00
Hunter Nichols 5bbc43d0a0 Added data collection of wordline and s_en measurements. 2019-01-17 01:59:41 -08:00
Jesse Cirimelli-Low 9c8090d94b added debug.info to logging 2019-01-16 19:56:23 -08:00
Jesse Cirimelli-Low db04fff20d Merge branch 'datasheet_gen' into dev - add log file 2019-01-16 19:31:12 -08:00
Matt Guthaus 7a152ea13d Move sram_factory to root dir 2019-01-16 17:06:29 -08:00
Matt Guthaus 9ecfaf16ea Add the factory class 2019-01-16 17:04:28 -08:00
Matt Guthaus 91636be642 Convert all contacts to use the sram_factory 2019-01-16 16:56:06 -08:00
Matt Guthaus 5192a01f2d Convert pgates to use ptx through the factory 2019-01-16 16:30:31 -08:00
Matt Guthaus a418431a42 First draft of sram_factory code 2019-01-16 16:15:38 -08:00
Jesse Cirimelli-Low 25b0da404f removed EOL error in comment 2019-01-16 16:08:41 -08:00
Jesse Cirimelli-Low 41b8e8665b updated datasheet descriptors 2019-01-16 15:43:08 -08:00
Jesse Cirimelli-Low 0556b86424 html datasheet no longer dependeds on sram 2019-01-16 14:52:01 -08:00
Matt Guthaus 553894c5a2 Remove library code and move to its own repository 2019-01-16 10:07:10 -08:00
Matt Guthaus 9431b93a1d Update copyright year 2019-01-16 09:43:31 -08:00
Matt Guthaus 2e7d2483eb Use github formatted 3-clause BSD license 2019-01-16 09:42:46 -08:00
Jesse Cirimelli-Low 192c615a38 moved library page to new repo 2019-01-16 07:33:17 -08:00
Hunter Nichols cc0be510c7 Added some data scaling and error calculation in model check. 2019-01-16 00:46:24 -08:00
Jesse Cirimelli-Low 813a551691 comment parsing 1/2 complete; page gen setup complete 2019-01-15 20:48:20 -08:00
Jesse Cirimelli-Low 903cafb336 html parsing finished 2019-01-15 19:47:48 -08:00
Hunter Nichols 6152ec7ec5 Merge branch 'dev' into multiport_characterization 2019-01-15 16:33:39 -08:00
Jesse Cirimelli-Low b66c53a99a added log file to datasheet 2019-01-13 15:02:13 -08:00
Jesse Cirimelli-Low 87380a4801 complete log file generation 2019-01-13 14:34:46 -08:00
Matt Guthaus e210ef2a41 Add assert to lef and verilog unit test. Fix verilog files in golden results. 2019-01-11 16:42:50 -08:00
Matt Guthaus a7dd62b0e5 falling_edge not negative_edge 2019-01-11 15:17:27 -08:00
Matt Guthaus 20b869f8e1 Remove tabs 2019-01-11 14:16:57 -08:00
Matt Guthaus 5de7ff3773 Updated Verilog to have multiport. Added 1rw,1rw/1r Verilog testbench. 2019-01-11 14:15:16 -08:00
Matt Guthaus f0ab155172 Change dout to negative clock edge relative 2019-01-11 09:51:05 -08:00
Hunter Nichols 21663439cc Added slews measurements to the model checker. Removed unused code in bitline delay class. 2019-01-09 22:42:34 -08:00
Jesse Cirimelli-Low a25e0f6c8c Merge branch 'dev' into datasheet_gen 2019-01-09 13:48:43 -08:00
Matt Guthaus cdef5f0ecb Change kbits to bits in output 2019-01-09 16:57:12 -08:00
Matt Guthaus be9f81768d Merge branch 'dev' of github.com:VLSIDA/PrivateRAM into dev 2019-01-09 15:20:34 -08:00
Matt Guthaus 94a6cbc28b Remove extra bracket in pin blokc 2019-01-09 13:44:25 -08:00
Jesse Cirimelli-Low b0978e62f3 removed openram placeholder logo to stage for public push 2019-01-09 12:32:17 -08:00
Matt Guthaus 49d0b9d69c Remove old scn3me golden results. Remove indices from new golden results. 2019-01-09 12:04:17 -08:00
Matt Guthaus fe077a453a Change capitalization of message to be consistent 2019-01-09 12:00:14 -08:00
Matt Guthaus 7e635d02be Remove indices from pins in lib file 2019-01-09 12:00:00 -08:00
Matt Guthaus 4d0a8b9c8a Check for coverage executable and run without if not found. 2019-01-09 08:24:20 -08:00
Jesse Cirimelli-Low e9b8eab2c3 Merge branch 'dev' into datasheet_gen 2019-01-09 06:16:09 -08:00
Jesse Cirimelli-Low 8b8985dbd1 track table_gen 2019-01-09 06:15:22 -08:00
Jesse Cirimelli-Low 1c9b59e71c removed flask requirement from README.md 2019-01-08 20:05:29 -08:00
Jesse Cirimelli-Low 3f8628fa94 flask totally purged, fixed table headers 2019-01-08 20:04:30 -08:00
Jesse Cirimelli-Low e58515b89b tables stable and flask removed, headers are bugged 2019-01-08 19:50:47 -08:00
Jesse Cirimelli-Low 6033cc604d stable, but incomplete flaskless table gen rewrite 2019-01-08 18:54:20 -08:00
Jesse Cirimelli-Low 19a986c35c no-flask rewrite for initial datasheet case complete 2019-01-07 19:43:57 -08:00
Jesse Cirimelli-Low 24161a1df2 Merge branch 'dev' into datasheet_gen 2019-01-07 18:18:46 -08:00
Jesse Cirimelli-Low 1283cbc3be fixed EOL error in descriptor 2019-01-07 18:17:38 -08:00
Jesse Cirimelli-Low 5508ae945d updated file html description to simplify parsing 2019-01-07 17:08:47 -08:00