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1952 Commits

Author SHA1 Message Date
Bastian Koppelmann b5701af864 column_mux: Allow y axis mirroring 
since the bitlines alternate in the bitcell array we also need to mirror
the port_data elements.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-28 15:51:39 +01:00
Bastian Koppelmann ed66fca031 write_driver/sense_amp/precharge arrays: Allow y axis mirroring 
since the bitlines alternate in the bitcell array we also need to mirror
the port_data elements.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-28 15:51:39 +01:00
Bastian Koppelmann dd1afe0313 Bitcell arrays: Allow mirroring on the y axis 
this allows for bitcells that need to be mirrored on the y axis, like
thin cells. However, the portdata elements also need to be mirrored on
the y axis. Otherwise the router will fail horribly when connecting
bitlines.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-28 15:51:21 +01:00
Bastian Koppelmann df9f351a91 Add custom cell properties to technologies 
this is technology specific database to store data about the custom
design cells. For now it only contains on which axis the bitcells are
mirrored. This is a first step to support thin cells that need to be
mirrored on the x and y axis.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-28 15:46:14 +01:00
Bastian Koppelmann 9749c522d1 tech: Make power_grid configurable 
this is the first step to allow engineers, porting technologies, more room
for routing their handmade cells.

For now, we don't allow the specification of power_grids where the lower layer
prefers to be routed vertically. This is due to the router not
connecting some pins properly in that case.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-28 12:06:34 +01:00
Bastian Koppelmann 90a4a72bba modules: Use add_power_pin API for all modules 
sense_amp_array, write_driver_array, and single_column_mux were the only offenders.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-28 11:47:49 +01:00
Bastian Koppelmann 988df8ebb9 hierarchy_layout: Add methods to create via stacks 
this allows us to simplify add_power_pin() and gives a clean
API to create vias through multiple layers.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-28 11:47:32 +01:00
Bastian Koppelmann 3fb2b9c1c3 Bitcell arrays: Create abstract base class 
a lot of functions of dummy- and bitcell-array are either copy-pasted or
have just slight differences. Merge all of those into an abstract base
class such that we don't have too much duplicate code.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-28 10:59:58 +01:00
Matt Guthaus e62beae805 Merge branch 'tech_migration' into dev 2020-01-25 12:03:56 -08:00
mrg 877ea53b7f Fix conflicting boundary name 2020-01-24 21:24:44 +00:00
mrg 71cbe74017 Round middle position fix 2020-01-24 18:00:28 +00:00
mrg aa8f389f28 Add fudge factor to pbitcell wells 2020-01-24 17:45:24 +00:00
mrg 9beb0f4ece Add separate well design rules. 
Needed to fix various pgates with wells.
Did some cleanup of these gates as well.
 2020-01-23 19:43:41 +00:00
mrg 306740f0f3 Add empty minarea function 2020-01-16 19:27:59 +00:00
mrg 262782cba0 Remove print, fix compare 2020-01-16 19:27:39 +00:00
mrg a2387da29d PEP format design 2020-01-16 19:26:57 +00:00
mrg ea00258be9 Cleanup contact 2020-01-16 19:26:43 +00:00
Bastian Koppelmann 2c610036b2 router/supply_grid_router: Print init time to the user 
this can take considerable amount of time, so the user knows that
useful work is done.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-03 12:24:14 +01:00
Bastian Koppelmann c0c89e465a vector: Implement hash cache for vector3d and vector 
this gives us a small runtime improvement in the router.

For FreePDK45 word_size=8, num_words=256

Improved
*** Maze routing supplies: 89.8 seconds
** Routing: 279.3 seconds

Non-improved
*** Maze routing supplies: 105.1 seconds
** Routing: 293.5 seconds

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-03 12:16:10 +01:00
Bastian Koppelmann 7ff5121d8c base/pin_layout: Implement hash cache 
the hash value only depends of the properties 'rect' and 'layer' so we
only compute the hash if those values are changed. Otherwise we just
return the precomputed value. This gives us a major speedup (~10x) if
the hash is used as a key in a dict.

During the grouping of pins in analyze_pins() this gives the best
improvements. For example for FreePDK45 with num_bits=8, num_words=256

Improved
**** Analyzing pins: 20.9 seconds
** Routing: 293.8 seconds
** SRAM creation: 349.8 seconds

Non-improved
**** Analyzing pins: 267.9 seconds
** Routing: 537.5 seconds
** SRAM creation: 592.9 seconds

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-03 11:39:59 +01:00
Bastian Koppelmann 14e8a26246 base/pin_layout: Make rect and layer properties 
only rect and layer are used to compute the hash for a pin. Having
those as properties allows us to cache the hash value and only update it
if either rect or layer are written.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2020-01-03 11:33:34 +01:00
Matthew Guthaus a6f5e59e18 Remove unused layers and simplify layer check to work without it. 2019-12-23 21:49:47 +00:00
Matthew Guthaus 082f575e2a Use active_width in ptx again despite colliding with DRC rule 2019-12-23 21:45:09 +00:00
Matthew Guthaus bec12f5b94 Cleanup. 2019-12-23 21:16:08 +00:00
Matt Guthaus 4ad920eaf7 Small fixes to tech usage. 2019-12-23 08:42:52 -08:00
Matt Guthaus 9ad06a7770 Move write mask vias to center to avoid data pins. 2019-12-20 11:48:27 -08:00
Matt Guthaus 89396698ef Non-preferred via in pnand active 2019-12-20 10:36:14 -08:00
Matt Guthaus 82496a66fe Simplify supply code. 2019-12-20 10:35:57 -08:00
Matt Guthaus 9e8b03d6c2 Merge branch 'dev' into tech_migration 2019-12-19 16:23:22 -08:00
Matt Guthaus d2461e5011 Supply indexing bug resolved. Recompute width/height basted on insts. 2019-12-19 16:19:21 -08:00
Matt Guthaus 0da8164ea6 Remove some unnecessary via directions. 2019-12-19 13:54:50 -08:00
Matt Guthaus b7d78ec2ec Fix ptx active contact orientation to non-default M1 direction. 2019-12-19 12:54:10 -08:00
Bastian Koppelmann 11760a9993 sram_factory: Add check for duplicate module name 
sram_factory cannot handle duplicate module name, thus we bail out and
raise an error if a user attempts that.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-19 16:31:52 +01:00
Bastian Koppelmann 1df16eceb6 sram_factory: Give proper priority to overrides 
modules overridden by the user are the highest priority, then modules
overridden by the technology. If nothing is overriden, use the defaults
from OPTS (if they exist) or use the requested module_type.

This fixes that custom tech_modules could not be used, if they had a default in
OPTS even if the latter was not overridden by the user.

We don't need extra defaults in the tech_modules, as we now only use them,
if they have been overridden by the tech_module.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-19 15:58:00 +01:00
Matt Guthaus 36cb675150 Fix minwidth for multiple via bug. 2019-12-18 09:30:00 -08:00
Bastian Koppelmann fab963701b sram_base: Instantiate "dff_array" and "bank" through sram_factory 
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-18 17:33:50 +01:00
Bastian Koppelmann 451ef4d896 sram_factory: Allow a prefered module name 
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-18 17:33:47 +01:00
Bastian Koppelmann de6b207798 hierachy_layout: Move number of via arg to add_power_pins() 
this allows custom modules to state how many vias they need
for power rails.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-18 17:33:43 +01:00
Matt Guthaus aceaa9fb21 Standardize contact names. 2019-12-17 15:55:20 -08:00
Matthew Guthaus 8e151553e4 Update contact types. 
Use preferred directions in tech files.
Programmatically generate based on interconnect stacks.
 2019-12-17 23:45:07 +00:00
Matthew Guthaus fc4685c7f7 Cleanup. 2019-12-17 23:07:01 +00:00
Matthew Guthaus 449b0a7c28 Make wire test programmatic 2019-12-17 22:36:38 +00:00
Matt Guthaus c025ce6356 Add li to preferred direction 2019-12-17 14:06:23 -08:00
Matt Guthaus 24546461ad Fix over-writing of active spacing rule. 2019-12-17 11:23:59 -08:00
Matt Guthaus ed28b4983b Clean up and generalize layer rules. 
Convert metalN to mN.
Generalize helper constants in modules for
space, width, enclose, etc.
Use layer stacks whever possible.
Try to remove drc() calls in liu of helper constants.
 2019-12-17 11:03:36 -08:00
Matt Guthaus a79d03fef4 Remove poly contact 2019-12-16 17:18:49 -08:00
Matt Guthaus d3a2c46cb9 Remove some contact tests 2019-12-16 17:15:29 -08:00
Matt Guthaus 6058af994c Fix ignore gds files 2019-12-16 15:39:32 -08:00
Matt Guthaus 3eb0dad06a Remove cells from DRC/LVS in the blackbox tech list. 2019-12-16 15:33:30 -08:00
Matt Guthaus acbbbe9403 Make exception more readable. 2019-12-16 12:07:40 -08:00
Matt Guthaus f30d0b9197 Fix KeyError for bitell types. 2019-12-16 12:04:33 -08:00
Matt Guthaus 5176a70f84 Add comments to module importing routines 2019-12-16 10:21:24 -08:00
Matt Guthaus 2a9129ef45 Small fix to tech and config over-rides 2019-12-16 10:11:26 -08:00
Matt Guthaus be4893839b Remove old drc/lvs override name 2019-12-16 10:05:52 -08:00
Bastian Koppelmann 306c0b92c3 globals: Add tech module path to Pythonpath if it exists 
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-16 16:56:16 +01:00
Bastian Koppelmann 74cd4f989d Remove hardcoded module class names 
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-16 16:56:06 +01:00
Bastian Koppelmann 233ec010ff modules: Create a class that wraps all the module class names 
this removes hard coded values from the module instatiations. It also allows
users to override certain modules with their custom cells.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-16 16:51:38 +01:00
Matt Guthaus f71cfe0d9d Generalize active and poly stacks 2019-12-13 14:56:14 -08:00
Matt Guthaus e143a6033f Use layer stacks from tech file in design class and throughout 2019-12-13 14:13:41 -08:00
Matt Guthaus 8d3f1d19cb Fix missing rule 2019-12-11 18:02:32 -08:00
Matt Guthaus 76f7019432 Merge branch 'dev' into tech_migration 2019-12-11 17:59:51 -08:00
Matt Guthaus e048ada23c Abstract basic DRC checks 2019-12-11 17:56:55 -08:00
Matt Guthaus f9a66e86b4 Add npc option to contact 2019-12-11 09:09:59 -08:00
Matt Guthaus 31de5ab87e Merge remote-tracking branch 'bkoppelmann/master' into dev 2019-12-11 08:46:52 -08:00
Bastian Koppelmann 928b02aa1f gdsMill: Fix reader/writer ignoring the 'DATATYPE' of 'PATH' records 
most readers (like KLayout/Calibre) will not open gds files omiting the
DATATYPE.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
 2019-12-11 10:47:38 +01:00
Matt Guthaus 4a1b10ff0d Remove extra cast 2019-12-05 21:33:13 -08:00
Matthew Guthaus f3286fb0c2 Don't add boundary to ptx 2019-12-06 02:37:12 +00:00
Matthew Guthaus 5af22b79e2 Only add boundary for if there's a DRC stdc layer 2019-12-06 02:17:58 +00:00
Matt Guthaus 53c72c6054 Merge branch 'tech_migration' of github.com:VLSIDA/PrivateRAM into tech_migration 2019-12-05 15:41:56 -08:00
Matt Guthaus d150b165de Merge branch 'tech_migration' of github.com:VLSIDA/PrivateRAM into tech_migration 2019-12-05 15:38:29 -08:00
Matt Guthaus b1d8a35aa7 Add contact variation 2019-12-05 15:38:25 -08:00
Matthew Guthaus 3deeaf7164 Decrease verbosity of boundary layer 2019-12-05 23:33:23 +00:00
Matthew Guthaus 7397f110c5 Add bbox for special DRC rule boundary 2019-12-05 23:14:25 +00:00
Matthew Guthaus 8f473b26a9 Add replica bitcell test for 1 port 2019-12-05 01:14:06 +00:00
Matthew Guthaus d519c00aa1 Fix contact order in test 2019-12-05 01:06:31 +00:00
Matt Guthaus 69bb245f28 Updates to gdsMill/tech layers 
Create active and poly contact types.
Define standard cell boundary option.
DataType and PurposeLayer are the same. Text must have type 0.
Remove vector from vlsiLayout. More debug in reader.
 2019-12-04 16:12:53 -08:00
Matt Guthaus 0d35941241 Fix missing dbUnit conversion in gdsMill 2019-12-03 12:06:58 -08:00
Matt Guthaus 7b9e7ff35b Nominal corner only for sim tests. Netlist only for speed. 2019-11-30 12:48:25 -08:00
Matt Guthaus 615c24f7bc Merge branch 'dev' into tech_migration 2019-11-30 12:38:35 -08:00
Matt Guthaus 6ef1b6a4ec Blackbox option for DRC waivers 2019-11-29 15:50:32 -08:00
Matt Guthaus 46c2cbd2d9 Check nominal_corner_only in new corner creation routine 2019-11-29 14:47:02 -08:00
Matt Guthaus bedae87315 Only use max/min and typical corner 2019-11-29 13:31:44 -08:00
Matt Guthaus 2a912dab7a Remove unused config files 2019-11-29 12:35:35 -08:00
Matt Guthaus 0cdd3af1aa Change default nominal corners to false and enable in test config. 2019-11-29 12:08:53 -08:00
Matt Guthaus d511f648c6 Move DRC/LVS/PEX tools to tech file. 2019-11-29 12:01:33 -08:00
Matt Guthaus abd8b0a23a Only setup bitcell when running top-level OpenRAM 2019-11-26 13:54:37 -08:00
Matt Guthaus b71d630643 None for layer means unused. 2019-11-26 13:34:39 -08:00
Matt Guthaus 04045cf672 Fix syntax error 2019-11-26 13:24:19 -08:00
Matt Guthaus f4599b7121 Default tools are calibre except for SCMOS 2019-11-26 13:23:18 -08:00
Matt Guthaus 102758881a Use layer instead of special flags for wells 2019-11-26 13:22:52 -08:00
Matt Guthaus 909321326d Ignore unused layers 2019-11-26 13:21:29 -08:00
Matt Guthaus 67a0928303 Merge branch 'dev' into tech_migration 2019-11-21 11:02:33 -08:00
Matt Guthaus 982e12be5e Increment minor version 2019-11-21 11:00:22 -08:00
Matt Guthaus 807923cbf1 Ignore pycache dirs. Fix output error message. 2019-11-21 10:11:19 -08:00
Matt Guthaus 190c5a078e Fix permissions on pwrite_driver test 2019-11-20 11:49:39 -08:00
Matt Guthaus 3364f47e56 Fix wrong supply voltage in config files. 2019-11-20 09:50:27 -08:00
Matt Guthaus 240c416100 Remove extra print 2019-11-17 10:40:01 -08:00
Matthew Guthaus cdf01c6c23 Fix test 30 for generic configs 2019-11-17 00:49:38 +00:00
Matthew Guthaus b3fb4e3183 Make unit test configs generic to tech_name 2019-11-17 00:44:31 +00:00
Matthew Guthaus b3b3cf0210 Merge remote-tracking branch 'origin/dev' into tech_migration 2019-11-17 00:15:18 +00:00