rom base passing tests with top level routing

This commit is contained in:
Jacob Walker
2023-03-30 11:30:50 -07:00
parent 7c453e80be
commit fef9902c45
11 changed files with 176 additions and 83 deletions
+13 -1
View File
@@ -107,4 +107,16 @@ class rom_address_control_array(design):
def route_sources(self):
self.route_horizontal_pins("vdd", insts=self.buf_insts, layer=self.route_layer)
self.route_horizontal_pins("gnd", insts=self.buf_insts, layer=self.route_layer)
self.route_horizontal_pins("gnd", insts=self.buf_insts, layer=self.route_layer)
tmp_pins = []
for pin in self.get_pins("vdd"):
edge = vector(pin.lx() + 0.5 * self.route_width, pin.cy())
tmp_pins.append(self.add_layout_pin_rect_center("vdd_edge", layer=self.route_layer, offset=edge))
self.copy_layout_pin_shapes("vdd")
self.remove_layout_pin("vdd")
for pin in tmp_pins:
print("copying pin")
self.copy_layout_pin(self, "vdd_edge", "vdd")
self.remove_layout_pin("vdd_edge")