mirror of https://github.com/VLSIDA/OpenRAM.git
Add slash in layers.map
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parent
51d7a673bd
commit
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@ -75,7 +75,7 @@ drc["grid"] = 0.0025
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drc["drc_rules"]=drclvs_home+"/calibreDRC.rul"
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drc["drc_rules"]=drclvs_home+"/calibreDRC.rul"
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drc["lvs_rules"]=drclvs_home+"/calibreLVS.rul"
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drc["lvs_rules"]=drclvs_home+"/calibreLVS.rul"
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drc["xrc_rules"]=drclvs_home+"/calibrexRC.rul"
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drc["xrc_rules"]=drclvs_home+"/calibrexRC.rul"
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drc["layer_map"]=os.environ.get("OPENRAM_TECH")+"freepdk45/layers.map"
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drc["layer_map"]=os.environ.get("OPENRAM_TECH")+"/freepdk45/layers.map"
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# minwidth_tx withcontact
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# minwidth_tx withcontact
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drc["minwidth_tx"]=0.09
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drc["minwidth_tx"]=0.09
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@ -59,7 +59,7 @@ drc["grid"]=0.15
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#DRC/LVS test set_up
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#DRC/LVS test set_up
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drc["drc_rules"]=drclvs_home+"/calibreDRC_scn3me_subm.rul"
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drc["drc_rules"]=drclvs_home+"/calibreDRC_scn3me_subm.rul"
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drc["lvs_rules"]=drclvs_home+"/calibreLVS_scn3me_subm.rul"
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drc["lvs_rules"]=drclvs_home+"/calibreLVS_scn3me_subm.rul"
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drc["layer_map"]=os.environ.get("OPENRAM_TECH")+"scn3me_subm/layers.map"
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drc["layer_map"]=os.environ.get("OPENRAM_TECH")+"/scn3me_subm/layers.map"
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# minwidth_tx withcontact
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# minwidth_tx withcontact
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