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cs instead of cs_buf now that everything else is working
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@@ -633,7 +633,7 @@ class control_logic_delay(design.design):
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if self.port_type=="rw":
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input_name = "we_bar"
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else:
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input_name = "cs_buf"
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input_name = "cs"
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# GATE FOR S_EN
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self.s_en_gate_inst = self.add_inst(name="and_s_en",
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mod=self.sen_and3)
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