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OpenRAM
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Xyce can be capital or lower case

This commit is contained in:
mrg 2021-05-18 14:58:57 -07:00
parent d51ec4fe45
commit fc17a1ff45
3 changed files with 5 additions and 5 deletions
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2
compiler/characterizer/__init__.py
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@ -34,7 +34,7 @@ if not OPTS.analytical_delay:
else: else:
(OPTS.spice_name, OPTS.spice_exe) = get_tool("spice", ["ngspice", "ngspice.exe", "hspice", "xa", "Xyce"]) (OPTS.spice_name, OPTS.spice_exe) = get_tool("spice", ["ngspice", "ngspice.exe", "hspice", "xa", "Xyce"])
if OPTS.spice_name == "Xyce": if OPTS.spice_name in ["Xyce", "xyce"]:
(OPTS.mpi_name, OPTS.mpi_exe) = get_tool("mpi", ["mpirun"]) (OPTS.mpi_name, OPTS.mpi_exe) = get_tool("mpi", ["mpirun"])
OPTS.hier_seperator = ":" OPTS.hier_seperator = ":"
else: else:

2
compiler/characterizer/charutils.py
View File

@ -26,7 +26,7 @@ def parse_spice_list(filename, key):
full_filename="{0}xa.meas".format(OPTS.openram_temp) full_filename="{0}xa.meas".format(OPTS.openram_temp)
elif OPTS.spice_name == "spectre": elif OPTS.spice_name == "spectre":
full_filename = os.path.join(OPTS.openram_temp, "delay_stim.measure") full_filename = os.path.join(OPTS.openram_temp, "delay_stim.measure")
elif OPTS.spice_name == "Xyce": elif OPTS.spice_name in ["Xyce", "xyce"]:
full_filename = os.path.join(OPTS.openram_temp, "spice_stdout.log") full_filename = os.path.join(OPTS.openram_temp, "spice_stdout.log")
else: else:
# ngspice/hspice using a .lis file # ngspice/hspice using a .lis file

6
compiler/characterizer/stimuli.py
View File

@ -271,7 +271,7 @@ class stimuli():
self.sf.write(".OPTIONS POST=1 RUNLVL={0} PROBE\n".format(runlvl)) self.sf.write(".OPTIONS POST=1 RUNLVL={0} PROBE\n".format(runlvl))
self.sf.write(".OPTIONS PSF=1 \n") self.sf.write(".OPTIONS PSF=1 \n")
self.sf.write(".OPTIONS HIER_DELIM=1 \n") self.sf.write(".OPTIONS HIER_DELIM=1 \n")
elif OPTS.spice_name == "Xyce": elif OPTS.spice_name in ["Xyce", "xyce"]:
self.sf.write(".OPTIONS DEVICE TEMP={}\n".format(self.temperature)) self.sf.write(".OPTIONS DEVICE TEMP={}\n".format(self.temperature))
self.sf.write(".OPTIONS MEASURE MEASFAIL=1\n") self.sf.write(".OPTIONS MEASURE MEASFAIL=1\n")
self.sf.write(".TRAN {0}p {1}n\n".format(timestep, end_time)) self.sf.write(".TRAN {0}p {1}n\n".format(timestep, end_time))
@ -318,7 +318,7 @@ class stimuli():
# Adding a commented out supply for simulators where gnd and 0 are not global grounds. # Adding a commented out supply for simulators where gnd and 0 are not global grounds.
self.sf.write("\n*Nodes gnd and 0 are the same global ground node in ngspice/hspice/xa. Otherwise, this source may be needed.\n") self.sf.write("\n*Nodes gnd and 0 are the same global ground node in ngspice/hspice/xa. Otherwise, this source may be needed.\n")
if OPTS.spice_name == "Xyce": if OPTS.spice_name in ["Xyce", "xyce"]:
self.sf.write("V{0} {0} {1} {2}\n".format(self.gnd_name, gnd_node_name, 0.0)) self.sf.write("V{0} {0} {1} {2}\n".format(self.gnd_name, gnd_node_name, 0.0))
else: else:
self.sf.write("*V{0} {0} {1} {2}\n".format(self.gnd_name, gnd_node_name, 0.0)) self.sf.write("*V{0} {0} {1} {2}\n".format(self.gnd_name, gnd_node_name, 0.0))
@ -358,7 +358,7 @@ class stimuli():
temp_stim, temp_stim,
OPTS.openram_temp) OPTS.openram_temp)
valid_retcode=0 valid_retcode=0
elif OPTS.spice_name == "Xyce": elif OPTS.spice_name in ["Xyce", "xyce"]:
if OPTS.num_sim_threads > 1 and OPTS.mpi_name: if OPTS.num_sim_threads > 1 and OPTS.mpi_name:
mpi_cmd = "{0} -np {1}".format(OPTS.mpi_exe, mpi_cmd = "{0} -np {1}".format(OPTS.mpi_exe,
OPTS.num_sim_threads) OPTS.num_sim_threads)