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synced 2026-09-07 19:28:08 +02:00
Fix pin nameon sense amp spice. Fix NAND2 bug in hierarchical decoder.
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@@ -250,9 +250,9 @@ class hierarchical_predecode(design.design):
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index_lst= nand_input_line_combination[k]
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if self.number_of_inputs == 2:
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gate_lst = ["B","A"]
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gate_lst = ["A","B"]
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else:
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gate_lst = ["C","B","A"]
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gate_lst = ["A","B","C"]
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# this will connect pins A,B or A,B,C
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for rail_pin,gate_pin in zip(index_lst,gate_lst):
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@@ -27,10 +27,10 @@ class hierarchical_predecode2x4(hierarchical_predecode):
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self.create_rails()
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self.add_input_inverters()
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self.add_output_inverters()
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connections =[["in[0]", "in[1]", "Z[3]", "vdd", "gnd"],
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["inbar[0]", "in[1]", "Z[2]", "vdd", "gnd"],
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connections =[["inbar[0]", "inbar[1]", "Z[0]", "vdd", "gnd"],
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["in[0]", "inbar[1]", "Z[1]", "vdd", "gnd"],
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["inbar[0]", "inbar[1]", "Z[0]", "vdd", "gnd"]]
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["inbar[0]", "in[1]", "Z[2]", "vdd", "gnd"],
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["in[0]", "in[1]", "Z[3]", "vdd", "gnd"]]
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self.add_nand(connections)
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self.route()
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@@ -32,6 +32,10 @@ class hierarchical_decoder_test(openram_test):
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# a = hierarchical_decoder.hierarchical_decoder(rows=8)
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# self.local_check(a)
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debug.info(1, "Testing 16 row sample for hierarchical_decoder")
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a = hierarchical_decoder.hierarchical_decoder(rows=16)
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self.local_check(a)
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debug.info(1, "Testing 32 row sample for hierarchical_decoder")
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a = hierarchical_decoder.hierarchical_decoder(rows=32)
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self.local_check(a)
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