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sram_base: Instantiate "dff_array" and "bank" through sram_factory 

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
This commit is contained in:
Bastian Koppelmann 2019-12-18 12:00:02 +01:00
parent 451ef4d896
commit fab963701b
2 changed files with 6 additions and 8 deletions
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1
compiler/modules/module_type.py
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@ -62,6 +62,7 @@ class ModuleType():
self.names['pwrite_driver'] = 'pwrite_driver'
self.names['ptristate_inv'] = 'ptristate_inv'
self.names['ptristate_buf'] = 'ptristate_buf'
self.names['dff_array'] = 'dff_array'
def __setitem__(self, b, c):
self.names[b] = c

13
compiler/sram/sram_base.py
View File

@ -271,28 +271,25 @@ class sram_base(design, verilog, lef):
self.dff = factory.create(module_type="dff")
# Create the address and control flops (but not the clk)
from dff_array import dff_array
self.row_addr_dff = dff_array(name="row_addr_dff", rows=self.row_addr_size, columns=1)
self.row_addr_dff = factory.create("dff_array", module_name="row_addr_dff", rows=self.row_addr_size, columns=1)
self.add_mod(self.row_addr_dff)
if self.col_addr_size > 0:
self.col_addr_dff = dff_array(name="col_addr_dff", rows=1, columns=self.col_addr_size)
self.col_addr_dff = factory.create("dff_array", module_name="col_addr_dff", rows=1, columns=self.col_addr_size)
self.add_mod(self.col_addr_dff)
else:
self.col_addr_dff = None
self.data_dff = dff_array(name="data_dff", rows=1, columns=self.word_size)
self.data_dff = factory.create("dff_array", module_name="data_dff", rows=1, columns=self.word_size)
self.add_mod(self.data_dff)
if self.write_size:
self.wmask_dff = dff_array(name="wmask_dff", rows=1, columns=self.num_wmasks)
self.wmask_dff = factory.create("dff_array", module_name="wmask_dff", rows=1, columns=self.num_wmasks)
self.add_mod(self.wmask_dff)
# Create the bank module (up to four are instantiated)
from bank import bank
self.bank = bank(self.sram_config,
name="bank")
self.bank = factory.create("bank", sram_config=self.sram_config, module_name="bank")
self.add_mod(self.bank)
# Create bank decoder