luke/OpenRAM
1
0
Fork 0
mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 09:30:38 +02:00
Code Issues Packages Projects Releases Wiki Activity

PR from mithro + other changable GDS file names

Browse Source
This commit is contained in:
mrg
2020-11-02 16:00:16 -08:00
parent 1caecf5a69
commit fa89b73ef8
38 changed files with 275 additions and 330 deletions
Download Patch File Download Diff File Expand all files Collapse all files
compiler/custom/dff.py
+12 -8
View File
@@ -23,18 +23,22 @@ class dff(design.design):
pin_names = props.dff.custom_port_list
type_list = props.dff.custom_type_list
clk_pin = props.dff.clk_pin
(width, height) = utils.get_libcell_size("dff",
GDS["unit"],
layer["boundary"])
pin_map = utils.get_libcell_pins(pin_names, "dff", GDS["unit"])
cell_size_layer = "boundary"
def __init__(self, name="dff"):
design.design.__init__(self, name)
self.width = dff.width
self.height = dff.height
self.pin_map = dff.pin_map
(width, height) = utils.get_libcell_size(name,
GDS["unit"],
layer[self.cell_size_layer])
pin_map = utils.get_libcell_pins(self.pin_names,
name,
GDS["unit"])
self.width = width
self.height = height
self.pin_map = pin_map
self.add_pin_types(self.type_list)
def analytical_power(self, corner, load):
compiler/custom/inv_dec.py
+12 -8
View File
@@ -19,18 +19,22 @@ class inv_dec(design.design):
pin_names = ["A", "Z", "vdd", "gnd"]
type_list = ["INPUT", "OUTPUT", "POWER", "GROUND"]
cell_size_layer = "boundary"
(width, height) = utils.get_libcell_size("inv_dec",
GDS["unit"],
layer["boundary"])
pin_map = utils.get_libcell_pins(pin_names, "inv_dec", GDS["unit"])
def __init__(self, name="inv_dec", height=None):
design.design.__init__(self, name)
self.width = inv_dec.width
self.height = inv_dec.height
self.pin_map = inv_dec.pin_map
(width, height) = utils.get_libcell_size(name,
GDS["unit"],
layer[self.cell_size_layer])
pin_map = utils.get_libcell_pins(self.pin_names,
name,
GDS["unit"])
self.width = width
self.height = height
self.pin_map = pin_map
self.add_pin_types(self.type_list)
def analytical_power(self, corner, load):
compiler/custom/nand2_dec.py
+12 -8
View File
@@ -18,18 +18,22 @@ class nand2_dec(design.design):
pin_names = ["A", "B", "Z", "vdd", "gnd"]
type_list = ["INPUT", "INPUT", "OUTPUT", "POWER", "GROUND"]
cell_size_layer = "boundary"
(width, height) = utils.get_libcell_size("nand2_dec",
GDS["unit"],
layer["boundary"])
pin_map = utils.get_libcell_pins(pin_names, "nand2_dec", GDS["unit"])
def __init__(self, name="nand2_dec", height=None):
design.design.__init__(self, name)
self.width = nand2_dec.width
self.height = nand2_dec.height
self.pin_map = nand2_dec.pin_map
(width, height) = utils.get_libcell_size(name,
GDS["unit"],
layer[self.cell_size_layer])
pin_map = utils.get_libcell_pins(self.pin_names,
name,
GDS["unit"])
self.width = width
self.height = height
self.pin_map = pin_map
self.add_pin_types(self.type_list)
# FIXME: For now...
compiler/custom/nand3_dec.py
+12 -8
View File
@@ -18,18 +18,22 @@ class nand3_dec(design.design):
pin_names = ["A", "B", "C", "Z", "vdd", "gnd"]
type_list = ["INPUT", "INPUT", "INPUT", "OUTPUT", "POWER", "GROUND"]
cell_size_layer = "boundary"
(width, height) = utils.get_libcell_size("nand3_dec",
GDS["unit"],
layer["boundary"])
pin_map = utils.get_libcell_pins(pin_names, "nand3_dec", GDS["unit"])
def __init__(self, name="nand3_dec", height=None):
design.design.__init__(self, name)
self.width = nand3_dec.width
self.height = nand3_dec.height
self.pin_map = nand3_dec.pin_map
(width, height) = utils.get_libcell_size(name,
GDS["unit"],
layer[self.cell_size_layer])
pin_map = utils.get_libcell_pins(self.pin_names,
name,
GDS["unit"])
self.width = width
self.height = height
self.pin_map = pin_map
self.add_pin_types(self.type_list)
# FIXME: For now...
compiler/custom/nand4_dec.py
+12 -8
View File
@@ -18,18 +18,22 @@ class nand4_dec(design.design):
pin_names = ["A", "B", "C", "D", "Z", "vdd", "gnd"]
type_list = ["INPUT", "INPUT", "INPUT", "INPUT", "OUTPUT", "POWER", "GROUND"]
cell_size_layer = "boundary"
(width, height) = utils.get_libcell_size("nand4_dec",
GDS["unit"],
layer["boundary"])
pin_map = utils.get_libcell_pins(pin_names, "nand4_dec", GDS["unit"])
def __init__(self, name="nand4_dec", height=None):
design.design.__init__(self, name)
self.width = nand4_dec.width
self.height = nand4_dec.height
self.pin_map = nand4_dec.pin_map
(width, height) = utils.get_libcell_size(name,
GDS["unit"],
layer[self.cell_size_layer])
pin_map = utils.get_libcell_pins(self.pin_names,
name,
GDS["unit"])
self.width = width
self.height = height
self.pin_map = pin_map
self.add_pin_types(self.type_list)
# FIXME: For now...
compiler/custom/tri_gate.py
+15 -7
View File
@@ -8,7 +8,8 @@
import debug
import design
import utils
from tech import GDS,layer
from tech import GDS, layer
class tri_gate(design.design):
"""
@@ -19,8 +20,7 @@ class tri_gate(design.design):
pin_names = ["in", "out", "en", "en_bar", "vdd", "gnd"]
type_list = ["INPUT", "OUTPUT", "INPUT", "INPUT", "POWER", "GROUND"]
(width,height) = utils.get_libcell_size("tri_gate", GDS["unit"], layer["boundary"])
pin_map = utils.get_libcell_pins(pin_names, "tri_gate", GDS["unit"])
cell_size_layer = "boundary"
unique_id = 1
@@ -31,9 +31,17 @@ class tri_gate(design.design):
design.design.__init__(self, name)
debug.info(2, "Create tri_gate")
self.width = tri_gate.width
self.height = tri_gate.height
self.pin_map = tri_gate.pin_map
(width, height) = utils.get_libcell_size(name,
GDS["unit"],
layer[self.cell_size_layer])
pin_map = utils.get_libcell_pins(self.pin_names,
name,
GDS["unit"])
self.width = width
self.height = height
self.pin_map = pin_map
self.add_pin_types(self.type_list)
def analytical_power(self, corner, load):
@@ -47,4 +55,4 @@ class tri_gate(design.design):
def build_graph(self, graph, inst_name, port_nets):
"""Adds edges based on inputs/outputs. Overrides base class function."""
self.add_graph_edges(graph, port_nets)
self.add_graph_edges(graph, port_nets)
compiler/custom/write_driver.py
+15 -12
View File
@@ -8,10 +8,10 @@
import debug
import design
import utils
from globals import OPTS
from tech import GDS,layer
from tech import GDS, layer
from tech import cell_properties as props
class write_driver(design.design):
"""
Tristate write driver to be active during write operations only.
@@ -28,20 +28,23 @@ class write_driver(design.design):
props.write_driver.pin.gnd]
type_list = ["INPUT", "OUTPUT", "OUTPUT", "INPUT", "POWER", "GROUND"]
if not OPTS.netlist_only:
(width,height) = utils.get_libcell_size("write_driver", GDS["unit"], layer["boundary"])
pin_map = utils.get_libcell_pins(pin_names, "write_driver", GDS["unit"])
else:
(width,height) = (0,0)
pin_map = []
cell_size_layer = "boundary"
def __init__(self, name):
design.design.__init__(self, name)
debug.info(2, "Create write_driver")
self.width = write_driver.width
self.height = write_driver.height
self.pin_map = write_driver.pin_map
(width, height) = utils.get_libcell_size(name,
GDS["unit"],
layer[self.cell_size_layer])
pin_map = utils.get_libcell_pins(self.pin_names,
name,
GDS["unit"])
self.width = width
self.height = height
self.pin_map = pin_map
self.add_pin_types(self.type_list)
def get_bl_names(self):
@@ -65,4 +68,4 @@ class write_driver(design.design):
def build_graph(self, graph, inst_name, port_nets):
"""Adds edges based on inputs/outputs. Overrides base class function."""
self.add_graph_edges(graph, port_nets)
self.add_graph_edges(graph, port_nets)