mirror of https://github.com/VLSIDA/OpenRAM.git
Copy predecoder supply pins
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@ -472,7 +472,11 @@ class hierarchical_decoder(design.design):
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self.add_layout_pin_rect_center(text=n,
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self.add_layout_pin_rect_center(text=n,
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layer="metal3",
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layer="metal3",
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offset=pin_pos)
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offset=pin_pos)
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# Copy the pins from the predecoders
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for pre in self.pre2x4_inst + self.pre3x8_inst:
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self.copy_layout_pin(pre, "vdd")
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self.copy_layout_pin(pre, "gnd")
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def connect_rail(self, rail_index, pin):
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def connect_rail(self, rail_index, pin):
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