mirror of https://github.com/VLSIDA/OpenRAM.git
Determine width after routing with no well contacts.
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@ -65,12 +65,12 @@ class pnand3(pgate.pgate):
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self.place_ptx()
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self.place_ptx()
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if self.add_wells:
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if self.add_wells:
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self.add_well_contacts()
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self.add_well_contacts()
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self.route_inputs()
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self.route_output()
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self.determine_width()
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self.determine_width()
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self.route_supply_rails()
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self.route_supply_rails()
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self.connect_rails()
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self.connect_rails()
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self.extend_wells()
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self.extend_wells()
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self.route_inputs()
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self.route_output()
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self.add_boundary()
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self.add_boundary()
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def add_ptx(self):
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def add_ptx(self):
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