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https://github.com/VLSIDA/OpenRAM.git
synced 2026-09-03 08:27:11 +02:00
Change OPTS.route_supplies option since there's only one router now
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@@ -113,7 +113,8 @@ class rom_bank(design,rom_verilog):
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# FIXME: Somehow ROM layout behaves weird and doesn't add all the pin
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# shapes before routing supplies
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init_bbox = self.get_bbox()
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self.route_supplies(init_bbox)
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if OPTS.route_supplies:
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self.route_supplies(init_bbox)
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# Route the pins to the perimeter
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if OPTS.perimeter_pins:
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# We now route the escape routes far enough out so that they will
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@@ -449,11 +450,7 @@ class rom_bank(design,rom_verilog):
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for inst in self.insts:
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self.copy_power_pins(inst, pin_name)
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if not OPTS.route_supplies:
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# Do not route the power supply (leave as must-connect pins)
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return
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else:
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from openram.router import supply_router as router
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from openram.router import supply_router as router
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rtr = router(layers=self.supply_stack,
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design=self,
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bbox=bbox,
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@@ -251,11 +251,7 @@ class sram_1bank(design, verilog, lef):
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for inst in self.insts:
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self.copy_power_pins(inst, pin_name, self.ext_supply[pin_name])
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if not OPTS.route_supplies:
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# Do not route the power supply (leave as must-connect pins)
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return
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else:
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from openram.router import supply_router as router
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from openram.router import supply_router as router
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rtr = router(layers=self.supply_stack,
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design=self,
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bbox=bbox,
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@@ -284,7 +280,7 @@ class sram_1bank(design, verilog, lef):
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pin.width(),
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pin.height())
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elif OPTS.route_supplies and OPTS.supply_pin_type == "single":
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elif OPTS.supply_pin_type == "single":
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# Update these as we may have routed outside the region (perimeter pins)
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lowest_coord = self.find_lowest_coords()
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@@ -1080,8 +1076,8 @@ class sram_1bank(design, verilog, lef):
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# We now route the escape routes far enough out so that they will
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# reach past the power ring or stripes on the sides
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self.route_escape_pins(init_bbox)
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self.route_supplies(init_bbox)
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if OPTS.route_supplies:
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self.route_supplies(init_bbox)
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def route_dffs(self, add_routes=True):
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